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Commit 5df1f412 authored by mjoang's avatar mjoang
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first version of sr bsr. remove test code

parent 607578f0
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Showing with 22 additions and 81 deletions
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ 5df1f412
......@@ -1319,7 +1319,6 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
}
else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */
if (pucch->sr_payload == 1) { /* positive scheduling request */
LOG_D(MAC,"%s(): SR transmitted pucch_resource == NULL O_SR %d O_ACK %d O_CSI %d\n",__func__, O_SR, O_ACK, O_CSI);
if (O_ACK == 1)
pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */
else if (O_ACK == 2)
......@@ -1437,7 +1436,6 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
}
else { /* SR + eventually ack are transmitted TS 36.213 9.2.5.1 UE procedure for multiplexing HARQ-ACK or CSI and SR */
if (pucch->sr_payload == 1) { /* positive scheduling request */
LOG_D(MAC,"%s(): SR transmitted PR_format0 O_SR %d O_ACK %d O_CSI %d\n",__func__, O_SR, O_ACK, O_CSI);
if (O_ACK == 1)
pucch_pdu->mcs = sequence_cyclic_shift_1_harq_ack_bit_positive_sr[pucch->ack_payload & 0x1]; /* positive SR and harq of 1 bit */
else if (O_ACK == 2)
......@@ -2146,7 +2144,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
// no UL-SCH resources available for this tti && UE has a valid PUCCH resources for SR configuration for this tti
DevCheck(module_idP < (int) NB_UE_INST, module_idP, NB_NR_UE_MAC_INST, 0);
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
#if 0
#if 0 // todo
// int MGL=6;// measurement gap length in ms
int MGRP = 0; // measurement gap repetition period in ms
int gapOffset = -1;
......@@ -2191,8 +2189,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
physicalConfigDedicated->schedulingRequestConfig->choice.setup.
dsr_TransMax)))) {
LOG_D(MAC,
"[UE %d][SR %x] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
module_idP, rnti, frameP, slot,
"[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
module_idP, frameP, slot,
mac->scheduling_info.SR_COUNTER,
(1 <<
(2 +
......@@ -2201,11 +2199,10 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
setup.dsr_TransMax)),
mac->scheduling_info.SR_pending);
#endif
DSR_TRANSMAX_t dsr_TransMax = sr_n64; //TBD
uint16_t rnti = 0; //TBD
DSR_TRANSMAX_t dsr_TransMax = sr_n64; // todo
LOG_D(MAC,
"[UE %d][SR %x] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
module_idP, rnti, frameP, slot,
"[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d\n",
module_idP, frameP, slot,
mac->scheduling_info.SR_COUNTER,
(1 <<
(2 +
......@@ -2213,13 +2210,13 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
// physicalConfigDedicated->schedulingRequestConfig->choice.
// setup.dsr_TransMax)),
dsr_TransMax)),
mac->scheduling_info.SR_pending);
mac->scheduling_info.SR_pending); // todo
/*
if ((mac->scheduling_info.sr_ProhibitTimer_Running == 0)) {
mac->scheduling_info.SR_pending = 1;
LOG_D(MAC,
"[UE %d][SR %x] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n",
module_idP, rnti, frameP, slot,
"[UE %d] Frame %d slot %d send SR indication (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, sr_ProhibitTimer_Running == 0\n",
module_idP, frameP, slot,
mac->scheduling_info.SR_COUNTER,
(1 <<
(2 +
......@@ -2227,10 +2224,10 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
// physicalConfigDedicated->schedulingRequestConfig->choice.
// setup.dsr_TransMax)),
dsr_TransMax)),
mac->scheduling_info.SR_pending);
mac->scheduling_info.SR_pending); // todo
return (0);
}
*/
*/ // todo
if ((mac->scheduling_info.SR_pending == 1) &&
(mac->scheduling_info.SR_COUNTER <
(1 <<
......@@ -2240,8 +2237,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
//dsr_TransMax)))) {
dsr_TransMax)))) {
LOG_D(MAC,
"[UE %d][SR %x] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n",
module_idP, rnti, frameP, slot,
"[UE %d] Frame %d slot %d PHY asks for SR (SR_COUNTER/dsr_TransMax %d/%d), SR_pending %d, increment SR_COUNTER\n",
module_idP, frameP, slot,
mac->scheduling_info.SR_COUNTER,
(1 <<
(2 +
......@@ -2249,7 +2246,7 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
//physicalConfigDedicated->schedulingRequestConfig->choice.
//setup.dsr_TransMax)),
dsr_TransMax)),
mac->scheduling_info.SR_pending);
mac->scheduling_info.SR_pending); // todo
mac->scheduling_info.SR_COUNTER++;
// start the sr-prohibittimer : rel 9 and above
......@@ -2269,8 +2266,8 @@ int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slot){
// initiate RA
if (mac->scheduling_info.SR_pending) {
// release all pucch resource
//mac->physicalConfigDedicated = NULL;
//mac->ul_active = 0;
//mac->physicalConfigDedicated = NULL; // todo
//mac->ul_active = 0; // todo
mac->BSR_reporting_active =
NR_BSR_TRIGGER_NONE;
LOG_I(MAC, "[UE %d] Release all SRs \n", module_idP);
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ 5df1f412
......@@ -2510,21 +2510,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
// Pointer used to build the MAC PDU by placing the RLC SDUs in the ULSCH buffer
uint8_t *pdu = ulsch_buffer;
/*
* test code
*/
#define test_long_bsr
#ifdef test_long_bsr
mac->scheduling_info.BSR_bytes[0]=28;
mac->scheduling_info.BSR_bytes[1]=75;
mac->scheduling_info.BSR_bytes[2]=205;
mac->scheduling_info.BSR_bytes[3]=560;
mac->scheduling_info.BSR_bytes[4]=1532;
mac->scheduling_info.BSR_bytes[5]=4189;
mac->scheduling_info.BSR_bytes[6]=11458;
mac->scheduling_info.BSR_bytes[7]=31342;
#endif
// Preparing the MAC CEs sub-PDUs and get the total size
bsr_header_len = 0;
//phr_header_len = 1; //sizeof(SCH_SUBHEADER_FIXED);
......@@ -2537,21 +2522,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
lcg_id++;
}
if (num_lcg_id_with_data) {
LOG_D(MAC,
"[UE %d] MAC Tx data pending at frame%d subframe %d nb LCG =%d Bytes for LCG0=%d LCG1=%d LCG2=%d LCG3=%d LCG4=%d LCG5=%d LCG6=%d LCG7=%d BSR Trigger status =%d TBS=%d\n",
module_idP, frameP, subframe, num_lcg_id_with_data,
mac->scheduling_info.BSR_bytes[0],
mac->scheduling_info.BSR_bytes[1],
mac->scheduling_info.BSR_bytes[2],
mac->scheduling_info.BSR_bytes[3],
mac->scheduling_info.BSR_bytes[4],
mac->scheduling_info.BSR_bytes[5],
mac->scheduling_info.BSR_bytes[6],
mac->scheduling_info.BSR_bytes[7],
mac->BSR_reporting_active, buflen);
}
//Restart ReTxBSR Timer at new grant indication (36.321)
if (mac->scheduling_info.retxBSR_SF !=
MAC_UE_BSR_TIMER_NOT_RUNNING) {
......@@ -2580,7 +2550,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
"Inconsistent BSR Trigger=%d !\n",
mac->BSR_reporting_active);
//A Regular or Periodic BSR can only be sent if TBS >= 4 as transmitting only a BSR is not allowed if UE has data to transmit
//A Regular or Periodic BSR can only be sent if TBS is sufficient as transmitting only a BSR is not allowed if UE has data to transmit
if (num_lcg_id_with_data <= 1) {
if (buflen >= (sizeof(NR_BSR_SHORT)+sizeof(NR_MAC_SUBHEADER_FIXED)+1)) {
bsr_ce_len = sizeof(NR_BSR_SHORT); //1 byte
......@@ -2756,34 +2726,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
}
}
if (bsr_ce_len) {
//Print updated BSR when sent
LOG_D(MAC,
"[UE %d] Remaining Buffer after Tx frame%d subframe %d nb LCG =%d Bytes for LCG0=%d LCG1=%d LCG2=%d LCG3=%d LCG4=%d LCG5=%d LCG6=%d LCG7=%d BSR Trigger status =%d TBS=%d\n",
module_idP, frameP, subframe, num_lcg_id_with_data,
mac->scheduling_info.BSR_bytes[0],
mac->scheduling_info.BSR_bytes[1],
mac->scheduling_info.BSR_bytes[2],
mac->scheduling_info.BSR_bytes[3],
mac->scheduling_info.BSR_bytes[4],
mac->scheduling_info.BSR_bytes[5],
mac->scheduling_info.BSR_bytes[6],
mac->scheduling_info.BSR_bytes[7],
mac->BSR_reporting_active, buflen);
LOG_D(MAC,
"[UE %d] Frame %d Subframe %d TX BSR Regular or Periodic size=%d BSR0=%d BSR1=%d BSR2=%d BSR3=%d BSR4=%d BSR5=%d BSR6=%d BSR7=%d\n",
module_idP, frameP, subframe, bsr_ce_len,
mac->scheduling_info.BSR[0],
mac->scheduling_info.BSR[1],
mac->scheduling_info.BSR[2],
mac->scheduling_info.BSR[3],
mac->scheduling_info.BSR[4],
mac->scheduling_info.BSR[5],
mac->scheduling_info.BSR[6],
mac->scheduling_info.BSR[7]);
}
#if 0
#if 0 // todo
// build PHR and update the timers
if (phr_ce_len == sizeof(POWER_HEADROOM_CMD)) {
if(NFAPI_MODE==NFAPI_UE_STUB_PNF) {
......@@ -2839,7 +2782,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
for (lcid = DCCH; lcid < NR_MAX_NUM_LCID; lcid++) {
// if (mac->
// logicalChannelConfig[lcid] != NULL) {
if (1) {
if (1) { // todo
lcg_id =
mac->scheduling_info.
LCGID[lcid];
......@@ -2851,7 +2794,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
// (mac->logicalChannelConfig
// [lcid]->ul_SpecificParameters->priority <=
// highest_priority)) {
(1)) {
(1)) { //todo
// highest_priority =
// mac->
// logicalChannelConfig[lcid]->
......@@ -2898,6 +2841,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
mac->scheduling_info.BSR[6];
bsr_l->Buffer_size7 =
mac->scheduling_info.BSR[7];
/*
LOG_D(MAC,
"[UE %d] Frame %d subframe %d BSR Trig=%d report long BSR (level LCGID0 %d,level LCGID1 %d,level LCGID2 %d,level LCGID3 %d level LCGID4 %d,level LCGID5 %d,level LCGID6 %d,level LCGID7 %d)\n",
module_idP, frameP, subframe,
......@@ -2910,6 +2854,7 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
mac->scheduling_info.BSR[5],
mac->scheduling_info.BSR[6],
mac->scheduling_info.BSR[7]);
*/
} else if (bsr_ce_len == sizeof(NR_BSR_SHORT)) {
bsr_l = NULL;
......@@ -2947,7 +2892,6 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
LOG_D(NR_MAC, "In %s copying %d bytes of MAC CEs to the UL PDU \n", __FUNCTION__, tot_mac_ce_len);
nr_write_ce_ulsch_pdu(pdu, mac, 0, NULL, bsr_t, bsr_s, bsr_l);
//memcpy((void *) pdu, (void *) mac_header_control_elements, tot_mac_ce_len);
pdu += (unsigned char) tot_mac_ce_len;
#ifdef ENABLE_MAC_PAYLOAD_DEBUG
......
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