Commit 6ff42815 authored by Francesco Mani's avatar Francesco Mani

scheduling of msg2 and filling of fapi structures

parent 35201666
...@@ -463,6 +463,7 @@ uint32_t nr_compute_tbs(uint16_t Qm, ...@@ -463,6 +463,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
uint16_t nb_symb_sch, uint16_t nb_symb_sch,
uint16_t nb_dmrs_prb, uint16_t nb_dmrs_prb,
uint16_t nb_rb_oh, uint16_t nb_rb_oh,
uint8_t tb_scaling,
uint8_t Nl); uint8_t Nl);
uint32_t nr_compute_tbslbrm(uint16_t table, uint32_t nr_compute_tbslbrm(uint16_t table,
......
...@@ -197,7 +197,6 @@ void rx_nr_prach_ru(RU_t *ru, ...@@ -197,7 +197,6 @@ void rx_nr_prach_ru(RU_t *ru,
ru->idx,frame,slot,prachfmt[prachFormat],msg1_frequencystart,prachStartSymbol); ru->idx,frame,slot,prachfmt[prachFormat],msg1_frequencystart,prachStartSymbol);
switch (prachFormat) { switch (prachFormat) {
AssertFatal(prachFormat<4,"Illegal prach format %d for length 139 (combined formats not supported yet)\n",prachFormat);
case 0: //A1 case 0: //A1
Ncp = 288/(1<<mu); Ncp = 288/(1<<mu);
break; break;
...@@ -717,7 +716,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB, ...@@ -717,7 +716,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
Xu=(int16_t*)gNB->X_u[preamble_offset-first_nonzero_root_idx]; Xu=(int16_t*)gNB->X_u[preamble_offset-first_nonzero_root_idx];
LOG_D(PHY,"PRACH RX new dft preamble_offset-first_nonzero_root_idx %d\n",preamble_index,preamble_offset-first_nonzero_root_idx); LOG_D(PHY,"PRACH RX new dft preamble_offset-first_nonzero_root_idx %d\n",preamble_offset-first_nonzero_root_idx);
memset(prach_ifft,0,((N_ZC==839) ? 2048 : 256)*sizeof(int32_t)); memset(prach_ifft,0,((N_ZC==839) ? 2048 : 256)*sizeof(int32_t));
......
...@@ -364,7 +364,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB, ...@@ -364,7 +364,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
} }
// harq_process->trials[nfapi_ulsch_pdu_rel15->round]++; // harq_process->trials[nfapi_ulsch_pdu_rel15->round]++;
harq_process->TBS = nr_compute_tbs(Qm, R, nb_rb, number_symbols, nb_re_dmrs*length_dmrs, 0, n_layers); harq_process->TBS = nr_compute_tbs(Qm, R, nb_rb, number_symbols, nb_re_dmrs*length_dmrs, 0, 0, n_layers);
A = harq_process->TBS; A = harq_process->TBS;
ret = ulsch->max_ldpc_iterations + 1; ret = ulsch->max_ldpc_iterations + 1;
......
...@@ -319,7 +319,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -319,7 +319,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*dmrs_length, nb_rb_oh, harq_process->Nl); harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*dmrs_length, nb_rb_oh, 0, harq_process->Nl);
A = harq_process->TBS; A = harq_process->TBS;
ret = dlsch->max_ldpc_iterations + 1; ret = dlsch->max_ldpc_iterations + 1;
...@@ -858,7 +858,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -858,7 +858,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*length_dmrs, nb_rb_oh, harq_process->Nl); harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*length_dmrs, nb_rb_oh, 0, harq_process->Nl);
A = harq_process->TBS; A = harq_process->TBS;
...@@ -1431,7 +1431,7 @@ void nr_dlsch_decoding_process(void *arg) ...@@ -1431,7 +1431,7 @@ void nr_dlsch_decoding_process(void *arg)
uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs uint16_t nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*length_dmrs, nb_rb_oh, harq_process->Nl); harq_process->TBS = nr_compute_tbs(harq_process->Qm,harq_process->R,nb_rb,nb_symb_sch,nb_re_dmrs*length_dmrs, nb_rb_oh, 0, harq_process->Nl);
A = harq_process->TBS; //2072 for QPSK 1/3 A = harq_process->TBS; //2072 for QPSK 1/3
......
...@@ -155,6 +155,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -155,6 +155,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
harq_process_ul_ue->number_of_symbols, harq_process_ul_ue->number_of_symbols,
ulsch_ue->nb_re_dmrs*ulsch_ue->length_dmrs, ulsch_ue->nb_re_dmrs*ulsch_ue->length_dmrs,
0, 0,
0,
harq_process_ul_ue->Nl); harq_process_ul_ue->Nl);
//-----------------------------------------------------// //-----------------------------------------------------//
......
...@@ -149,7 +149,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ ...@@ -149,7 +149,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus; uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus; uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d%d DL_req:SFN/SLO:%04d%d:dl_pdu:%d tx_req:SFN/SLOT:%04d%d:pdus:%d;ul_dci %d ul_tti %d\n", LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n",
frame,slot, frame,slot,
DL_req->SFN,DL_req->Slot,number_dl_pdu, DL_req->SFN,DL_req->Slot,number_dl_pdu,
TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs, TX_req->SFN,TX_req->Slot,TX_req->Number_of_PDUs,
......
...@@ -116,9 +116,9 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot, ...@@ -116,9 +116,9 @@ void L1_nr_prach_procedures(PHY_VARS_gNB *gNB,int frame,int slot,
gNB->UL_INFO.rach_ind.slot = slot; gNB->UL_INFO.rach_ind.slot = slot;
gNB->prach_pdu_indication_list[0].phy_cell_id = gNB->gNB_config.cell_config.phy_cell_id.value; gNB->prach_pdu_indication_list[0].phy_cell_id = gNB->gNB_config.cell_config.phy_cell_id.value;
gNB->prach_pdu_indication_list[0].symbol_index = prach_pdu->prach_start_symbol; gNB->prach_pdu_indication_list[0].symbol_index = prach_pdu->prach_start_symbol; // FIXME to be changed for multi-ssb (this is only the start symbol of first occasion)
gNB->prach_pdu_indication_list[0].slot_index = slot; gNB->prach_pdu_indication_list[0].slot_index = slot;
gNB->prach_pdu_indication_list[0].freq_index = 0; // single frequency for now gNB->prach_pdu_indication_list[0].freq_index = prach_pdu->num_ra;
gNB->prach_pdu_indication_list[0].avg_rssi = (max_preamble_energy[0]<631) ? (128+(max_preamble_energy[0]/5)) : 254; gNB->prach_pdu_indication_list[0].avg_rssi = (max_preamble_energy[0]<631) ? (128+(max_preamble_energy[0]/5)) : 254;
gNB->prach_pdu_indication_list[0].avg_snr = 0xff; // invalid for now gNB->prach_pdu_indication_list[0].avg_snr = 0xff; // invalid for now
......
...@@ -160,7 +160,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -160,7 +160,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (gNB->pdcch_pdu || gNB->ul_dci_pdu) { if (gNB->pdcch_pdu || gNB->ul_dci_pdu) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n", LOG_I(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
gNB->Mod_id, frame, slot, gNB->Mod_id, frame, slot,
gNB->ul_dci_pdu==NULL?0:gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci, gNB->ul_dci_pdu==NULL?0:gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci,
gNB->pdcch_pdu==NULL?0:gNB->pdcch_pdu->pdcch_pdu_rel15.numDlDci); gNB->pdcch_pdu==NULL?0:gNB->pdcch_pdu->pdcch_pdu_rel15.numDlDci);
...@@ -176,9 +176,9 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -176,9 +176,9 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
} }
LOG_D(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti);
for (int i=0; i<gNB->num_pdsch_rnti; i++) { for (int i=0; i<gNB->num_pdsch_rnti; i++) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,1);
LOG_I(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti);
nr_generate_pdsch(gNB->dlsch[i][0], nr_generate_pdsch(gNB->dlsch[i][0],
gNB->nr_gold_pdsch_dmrs[slot], gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF, gNB->common_vars.txdataF,
......
...@@ -442,7 +442,7 @@ int main(int argc, char **argv) ...@@ -442,7 +442,7 @@ int main(int argc, char **argv)
mod_order = nr_get_Qm_dl(Imcs, mcs_table); mod_order = nr_get_Qm_dl(Imcs, mcs_table);
rate = nr_get_code_rate_dl(Imcs, mcs_table); rate = nr_get_code_rate_dl(Imcs, mcs_table);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1); available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order,rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, Nl); TBS = nr_compute_tbs(mod_order,rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);
printf("available bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order); printf("available bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order);
//dlsch->harq_ids[subframe]= 0; //dlsch->harq_ids[subframe]= 0;
rel15->rbSize = nb_rb; rel15->rbSize = nb_rb;
......
...@@ -391,7 +391,7 @@ int main(int argc, char **argv) ...@@ -391,7 +391,7 @@ int main(int argc, char **argv)
mod_order = nr_get_Qm_ul(Imcs, 0); mod_order = nr_get_Qm_ul(Imcs, 0);
code_rate = nr_get_code_rate_ul(Imcs, 0); code_rate = nr_get_code_rate_ul(Imcs, 0);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1); available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order,code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, Nl); TBS = nr_compute_tbs(mod_order,code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);
printf("\nAvailable bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order); printf("\nAvailable bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order);
......
...@@ -570,7 +570,7 @@ int main(int argc, char **argv) ...@@ -570,7 +570,7 @@ int main(int argc, char **argv)
nb_re_dmrs = ((UE->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1) ? 6 : 4) * number_dmrs_symbols; nb_re_dmrs = ((UE->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1) ? 6 : 4) * number_dmrs_symbols;
code_rate = nr_get_code_rate_ul(Imcs, 0); code_rate = nr_get_code_rate_ul(Imcs, 0);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1); available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, precod_nbr_layers); TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, precod_nbr_layers);
printf("\n"); printf("\n");
......
...@@ -246,7 +246,7 @@ ...@@ -246,7 +246,7 @@
{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:-1,TYPE_INT64,0/*17*/},\ {GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[0]->startSymbolAndLength,defint64val:-1,TYPE_INT64,0/*17*/},\
{GNB_CONFIG_STRING_INITIALDLBWPK0_1,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0,defint64val:-1,TYPE_INT64,0/*18*/},\ {GNB_CONFIG_STRING_INITIALDLBWPK0_1,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->k0,defint64val:-1,TYPE_INT64,0/*18*/},\
{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*19*/},\ {GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*19*/},\
{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_0,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*20*/}, \ {GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_1,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[1]->startSymbolAndLength,defint64val:53,TYPE_INT64,0/*20*/}, \
{GNB_CONFIG_STRING_INITIALDLBWPK0_2,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0,defint64val:-1,TYPE_INT64,0/*21*/},\ {GNB_CONFIG_STRING_INITIALDLBWPK0_2,NULL,0,i64ptr:scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->k0,defint64val:-1,TYPE_INT64,0/*21*/},\
{GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*22*/},\ {GNB_CONFIG_STRING_INITIALDLBWPMAPPINGTYPE_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->mappingType,defint64val:NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA,TYPE_INT64,0/*22*/},\
{GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*23*/},\ {GNB_CONFIG_STRING_INITIALDLBWPSTARTSYMBOLANDLENGTH_2,NULL,0,i64ptr:&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[2]->startSymbolAndLength,defint64val:54,TYPE_INT64,0/*23*/},\
......
...@@ -1381,7 +1381,8 @@ int32_t get_nr_uldl_offset(int nr_bandP) ...@@ -1381,7 +1381,8 @@ int32_t get_nr_uldl_offset(int nr_bandP)
void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu, void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead) { int x_overhead,
uint8_t tb_scaling) {
LOG_D(MAC, "TBS calculation\n"); LOG_D(MAC, "TBS calculation\n");
...@@ -1411,6 +1412,7 @@ void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu, ...@@ -1411,6 +1412,7 @@ void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
N_sh_symb, N_sh_symb,
N_PRB_DMRS, N_PRB_DMRS,
N_PRB_oh, N_PRB_oh,
tb_scaling,
pdsch_rel15->nrOfLayers)>>3; pdsch_rel15->nrOfLayers)>>3;
pdsch_rel15->targetCodeRate[0] = R; pdsch_rel15->targetCodeRate[0] = R;
......
...@@ -264,122 +264,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram ...@@ -264,122 +264,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
*/ */
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) {
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = gNB->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0];
uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
uint8_t mu,N_dur,N_t_slot,start_symbol;
uint16_t format;
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
mu = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
mu = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
// prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4
if ( get_nr_prach_info_from_index(config_index,
(int)frameP,
(int)slotP,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA,
mu,
cc->frame_type,
&format,
&start_symbol,
&N_t_slot,
&N_dur) ) {
int fdm = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM;
uint16_t format0 = format&0xff; // first column of format from table
uint16_t format1 = (format>>8)&0xff; // second column of format from table
UL_tti_req->SFN = frameP;
UL_tti_req->Slot = slotP;
for (int n=0; n<(1<<fdm); n++) { // one structure per frequency domain occasion
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_prach_pdu_t);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu;
memset(prach_pdu,0,sizeof(nfapi_nr_prach_pdu_t));
UL_tti_req->n_pdus+=1;
// filling the prach fapi structure
prach_pdu->phys_cell_id = *scc->physCellId;
prach_pdu->num_prach_ocas = N_t_slot;
prach_pdu->prach_start_symbol = start_symbol;
prach_pdu->num_ra = n;
prach_pdu->num_cs = get_NCS(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,
format0,
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig);
// SCF PRACH PDU format field does not consider A1/B1 etc. possibilities
// We added 9 = A1/B1 10 = A2/B2 11 A3/B3
if (format1!=0xff) {
switch(format0) {
case 0xa1:
prach_pdu->prach_format = 9;
break;
case 0xa2:
prach_pdu->prach_format = 10;
break;
case 0xa3:
prach_pdu->prach_format = 10;
break;
default:
AssertFatal(1==0,"Only formats A1/B1 A2/B2 A3/B3 are valid for dual format");
}
}
else{
switch(format0) {
case 0xa1:
prach_pdu->prach_format = 0;
break;
case 0xa2:
prach_pdu->prach_format = 1;
break;
case 0xa3:
prach_pdu->prach_format = 2;
break;
case 0xb1:
prach_pdu->prach_format = 3;
break;
case 0xb2:
prach_pdu->prach_format = 4;
break;
case 0xb3:
prach_pdu->prach_format = 5;
break;
case 0xb4:
prach_pdu->prach_format = 6;
break;
case 0xc0:
prach_pdu->prach_format = 7;
break;
case 0xc2:
prach_pdu->prach_format = 8;
break;
case 0:
// long formats are handled @ PHY
break;
case 1:
// long formats are handled @ PHY
break;
case 2:
// long formats are handled @ PHY
break;
case 3:
// long formats are handled @ PHY
break;
default:
AssertFatal(1==0,"Invalid PRACH format");
}
}
}
}
}
/* /*
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{ {
...@@ -483,10 +367,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -483,10 +367,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
gNB->ta_len = 2; gNB->ta_len = 2;
} }
if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_rxP))
nr_schedule_RA(module_idP, frame_txP, slot_txP);
// Phytest scheduling // Phytest scheduling
if (phy_test && slot_txP==1){ if (phy_test && slot_txP==1){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL); //nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
//nr_schedule_RA(module_idP, frame_txP, slot_txP);
// resetting ta flag // resetting ta flag
gNB->ta_len = 0; gNB->ta_len = 0;
} }
...@@ -504,7 +390,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -504,7 +390,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP); schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
if (phy_test && slot_rxP==8){ if (phy_test && slot_rxP==8){
nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP); //nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
} }
} }
......
...@@ -272,6 +272,13 @@ int configure_fapi_dl_pdu(int Mod_idP, ...@@ -272,6 +272,13 @@ int configure_fapi_dl_pdu(int Mod_idP,
secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count); secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]; NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n");
AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0,
"searchPsacesToAddModList is empty\n");
NR_SearchSpace_t *ss;
// TO BE FIXED we are just selecting the first search space here (only one is configured)
ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[0];
dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
...@@ -369,6 +376,7 @@ int configure_fapi_dl_pdu(int Mod_idP, ...@@ -369,6 +376,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
nr_configure_pdcch(pdcch_pdu_rel15, nr_configure_pdcch(pdcch_pdu_rel15,
1, // ue-specific 1, // ue-specific
ss,
scc, scc,
bwp); bwp);
...@@ -398,7 +406,7 @@ int configure_fapi_dl_pdu(int Mod_idP, ...@@ -398,7 +406,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
pdcch_pdu_rel15->DurationSymbols); pdcch_pdu_rel15->DurationSymbols);
int x_Overhead = 0; // should be 0 for initialBWP int x_Overhead = 0; // should be 0 for initialBWP
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead); nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead,0);
// Hardcode it for now // Hardcode it for now
TBS = dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15.TBSize[0]; TBS = dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15.TBSize[0];
...@@ -710,6 +718,12 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, ...@@ -710,6 +718,12 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0]; nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0]; nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n");
AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0,
"searchPsacesToAddModList is empty\n");
NR_SearchSpace_t *ss;
// TO BE FIXED we are just selecting the first search space here (only one is configured)
ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[0];
uint16_t rnti = UE_list->rnti[UE_id]; uint16_t rnti = UE_list->rnti[UE_id];
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu; nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu;
...@@ -784,6 +798,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, ...@@ -784,6 +798,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
pusch_pdu->nr_of_symbols, pusch_pdu->nr_of_symbols,
6, //nb_re_dmrs - not sure where this is coming from - its not in the FAPI 6, //nb_re_dmrs - not sure where this is coming from - its not in the FAPI
0, //nb_rb_oh 0, //nb_rb_oh
0,
pusch_pdu->nrOfLayers = 1); pusch_pdu->nrOfLayers = 1);
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
//pusch_pdu->pusch_data.cb_present_and_position; //pusch_pdu->pusch_data.cb_present_and_position;
...@@ -816,6 +831,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, ...@@ -816,6 +831,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frameP,slotP); LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frameP,slotP);
nr_configure_pdcch(pdcch_pdu_rel15, nr_configure_pdcch(pdcch_pdu_rel15,
1, // ue-specific, 1, // ue-specific,
ss,
scc, scc,
bwp); bwp);
......
...@@ -89,18 +89,17 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); ...@@ -89,18 +89,17 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
@param rnti RA rnti corresponding to this PRACH preamble @param rnti RA rnti corresponding to this PRACH preamble
@param rach_resource type (0=non BL/CE,1 CE level 0,2 CE level 1, 3 CE level 2,4 CE level 3) @param rach_resource type (0=non BL/CE,1 CE level 0,2 CE level 1, 3 CE level 2,4 CE level 3)
*/ */
void nr_initiate_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, void nr_initiate_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP,
uint16_t preamble_index, int16_t timing_offset); uint16_t preamble_index, uint8_t freq_index, uint8_t symbol, int16_t timing_offset);
void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP); void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP);
int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only); int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only);
void nr_get_Msg3alloc(NR_COMMON_channels_t *cc, void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc,
sub_frame_t current_subframe, sub_frame_t current_subframe,
frame_t current_frame, frame_t current_frame,
frame_t *frame, NR_RA_t *ra);
sub_frame_t *subframe);
/* \brief Function in gNB to fill RAR pdu when requested by PHY. /* \brief Function in gNB to fill RAR pdu when requested by PHY.
@param ra Instance of RA resources of gNB @param ra Instance of RA resources of gNB
...@@ -113,6 +112,8 @@ void nr_fill_rar(uint8_t Mod_idP, ...@@ -113,6 +112,8 @@ void nr_fill_rar(uint8_t Mod_idP,
uint16_t N_RB_UL); uint16_t N_RB_UL);
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs); uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs);
/////// Phy test scheduler /////// /////// Phy test scheduler ///////
...@@ -168,6 +169,7 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, ...@@ -168,6 +169,7 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu, void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
int ss_type, int ss_type,
NR_SearchSpace_t *ss,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp); NR_BWP_Downlink_t *bwp);
...@@ -181,7 +183,8 @@ int get_spf(nfapi_nr_config_request_scf_t *cfg); ...@@ -181,7 +183,8 @@ int get_spf(nfapi_nr_config_request_scf_t *cfg);
int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot); int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot);
void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu, void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead); int x_overhead,
uint8_t tb_scaling);
/** \brief Computes Q based on I_MCS PDSCH and table_idx for downlink. Implements MCS Tables from 38.214. */ /** \brief Computes Q based on I_MCS PDSCH and table_idx for downlink. Implements MCS Tables from 38.214. */
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx); uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx); uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx);
...@@ -236,6 +239,17 @@ void config_nr_mib(int Mod_idP, ...@@ -236,6 +239,17 @@ void config_nr_mib(int Mod_idP,
int cellBarred, int cellBarred,
int intraFreqReselection); int intraFreqReselection);
void nr_generate_Msg2(module_id_t module_idP,
int CC_id,
frame_t frameP,
sub_frame_t slotP);
int find_aggregation_level (NR_SearchSpace_t *ss);
void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
uint16_t *slot_period,
uint16_t *offset);
/* \brief Function to indicate a received SDU on ULSCH. /* \brief Function to indicate a received SDU on ULSCH.
@param Mod_id Instance ID of gNB @param Mod_id Instance ID of gNB
@param CC_id Component carrier index @param CC_id Component carrier index
......
...@@ -39,6 +39,7 @@ uint32_t nr_compute_tbs(uint16_t Qm, ...@@ -39,6 +39,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
uint16_t nb_symb_sch, uint16_t nb_symb_sch,
uint16_t nb_dmrs_prb, uint16_t nb_dmrs_prb,
uint16_t nb_rb_oh, uint16_t nb_rb_oh,
uint8_t tb_scaling,
uint8_t Nl) uint8_t Nl)
{ {
...@@ -54,7 +55,7 @@ uint32_t nr_compute_tbs(uint16_t Qm, ...@@ -54,7 +55,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
scale = (R>1024)?11:10; scale = (R>1024)?11:10;
// Intermediate number of information bits // Intermediate number of information bits
Ninfo = (nb_re * R * Qm * Nl)>>scale; Ninfo = ((nb_re * R * Qm * Nl)>>scale)>>tb_scaling;
if (Ninfo <=3824) { if (Ninfo <=3824) {
n = max(3, floor(log2(Ninfo)) - 6); n = max(3, floor(log2(Ninfo)) - 6);
......
...@@ -87,8 +87,8 @@ typedef enum { ...@@ -87,8 +87,8 @@ typedef enum {
typedef struct { typedef struct {
/// Flag to indicate this process is active /// Flag to indicate this process is active
RA_state_t state; RA_state_t state;
/// Subframe where preamble was received /// Slot where preamble was received
uint8_t preamble_subframe; uint8_t preamble_slot;
/// Subframe where Msg2 is to be sent /// Subframe where Msg2 is to be sent
uint8_t Msg2_slot; uint8_t Msg2_slot;
/// Frame where Msg2 is to be sent /// Frame where Msg2 is to be sent
...@@ -133,6 +133,8 @@ typedef struct { ...@@ -133,6 +133,8 @@ typedef struct {
int msg4_TBsize; int msg4_TBsize;
/// MCS used for Msg4 /// MCS used for Msg4
int msg4_mcs; int msg4_mcs;
/// RA search space
NR_SearchSpace_t *ra_ss;
} NR_RA_t; } NR_RA_t;
/*! \brief gNB common channels */ /*! \brief gNB common channels */
......
...@@ -68,6 +68,8 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) { ...@@ -68,6 +68,8 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
UL_info->rach_ind.sfn, UL_info->rach_ind.sfn,
UL_info->rach_ind.slot, UL_info->rach_ind.slot,
UL_info->rach_ind.pdu_list[0].preamble_list[0].preamble_index, UL_info->rach_ind.pdu_list[0].preamble_list[0].preamble_index,
UL_info->rach_ind.pdu_list[0].freq_index,
UL_info->rach_ind.pdu_list[0].symbol_index,
UL_info->rach_ind.pdu_list[0].preamble_list[0].timing_advance); UL_info->rach_ind.pdu_list[0].preamble_list[0].timing_advance);
} }
......
...@@ -405,17 +405,45 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -405,17 +405,45 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
bwp->bwp_Common->pdcch_ConfigCommon->present = NR_SetupRelease_PDCCH_ConfigCommon_PR_setup; bwp->bwp_Common->pdcch_ConfigCommon->present = NR_SetupRelease_PDCCH_ConfigCommon_PR_setup;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup = calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup)); bwp->bwp_Common->pdcch_ConfigCommon->choice.setup = calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup));
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=NULL; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet=NULL; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet));
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceZero=NULL;
NR_ControlResourceSet_t *coreset = calloc(1,sizeof(*coreset));
coreset->controlResourceSetId=1;
// frequencyDomainResources '11111111 11111111 00000000 00000000 00000000 00000'B,
coreset->frequencyDomainResources.buf = calloc(1,6);
coreset->frequencyDomainResources.buf[0] = 0xff;
coreset->frequencyDomainResources.buf[1] = 0xff;
coreset->frequencyDomainResources.buf[2] = 0;
coreset->frequencyDomainResources.buf[3] = 0;
coreset->frequencyDomainResources.buf[4] = 0;
coreset->frequencyDomainResources.buf[5] = 0;
coreset->frequencyDomainResources.size = 6;
coreset->frequencyDomainResources.bits_unused = 3;
coreset->duration=1;
coreset->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved;
coreset->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
coreset->tci_StatesPDCCH_ToAddList=calloc(1,sizeof(*coreset->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8];
for (int i=0;i<8;i++) {
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&coreset->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
coreset->tci_StatesPDCCH_ToReleaseList = NULL;
coreset->tci_PresentInDCI = NULL;
coreset->pdcch_DMRS_ScramblingID = NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet = coreset;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceZero=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList=NULL; bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList)); bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList));
NR_SearchSpace_t *ss=calloc(1,sizeof(*ss)); NR_SearchSpace_t *ss=calloc(1,sizeof(*ss));
ss->searchSpaceId = 1; ss->searchSpaceId = 1;
ss->controlResourceSetId=calloc(1,sizeof(*ss->controlResourceSetId)); ss->controlResourceSetId=calloc(1,sizeof(*ss->controlResourceSetId));
*ss->controlResourceSetId=0; *ss->controlResourceSetId=1;
ss->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss->monitoringSlotPeriodicityAndOffset)); ss->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss->monitoringSlotPeriodicityAndOffset));
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1; ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
ss->duration=NULL; ss->duration=NULL;
...@@ -472,64 +500,13 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -472,64 +500,13 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
bwp->bwp_Dedicated->pdcch_Config->present = NR_SetupRelease_PDCCH_Config_PR_setup; bwp->bwp_Dedicated->pdcch_Config->present = NR_SetupRelease_PDCCH_Config_PR_setup;
bwp->bwp_Dedicated->pdcch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup)); bwp->bwp_Dedicated->pdcch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup));
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList)); bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList));
NR_ControlResourceSet_t *coreset0 = calloc(1,sizeof(*coreset0));
coreset0->controlResourceSetId=1;
// frequencyDomainResources '11111111 11111111 00000000 00000000 00000000 00000'B,
coreset0->frequencyDomainResources.buf = calloc(1,6);
coreset0->frequencyDomainResources.buf[0] = 0xff;
coreset0->frequencyDomainResources.buf[1] = 0xff;
coreset0->frequencyDomainResources.buf[2] = 0;
coreset0->frequencyDomainResources.buf[3] = 0;
coreset0->frequencyDomainResources.buf[4] = 0;
coreset0->frequencyDomainResources.buf[5] = 0;
coreset0->frequencyDomainResources.size = 6;
coreset0->frequencyDomainResources.bits_unused = 3;
coreset0->duration=1;
coreset0->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved;
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
coreset0->tci_StatesPDCCH_ToAddList=calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8];
for (int i=0;i<8;i++) {
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
coreset0->tci_PresentInDCI = NULL;
coreset0->pdcch_DMRS_ScramblingID = NULL;
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list, ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list,
coreset0); coreset);
bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList)); bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList));
NR_SearchSpace_t *ss3 = calloc(1,sizeof(*ss3));
NR_SearchSpace_t *ss2 = calloc(1,sizeof(*ss2)); NR_SearchSpace_t *ss2 = calloc(1,sizeof(*ss2));
ss3->searchSpaceId=3;
ss3->controlResourceSetId=calloc(1,sizeof(*ss3->controlResourceSetId));
*ss3->controlResourceSetId=1;
ss3->monitoringSlotPeriodicityAndOffset=calloc(1,sizeof(*ss3->monitoringSlotPeriodicityAndOffset));
ss3->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
ss3->monitoringSlotPeriodicityAndOffset->choice.sl1=(NULL_t)0;
ss3->duration=NULL;
ss3->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss3->monitoringSymbolsWithinSlot));
ss3->monitoringSymbolsWithinSlot->buf = calloc(1,2);
ss3->monitoringSymbolsWithinSlot->size = 2;
ss3->monitoringSymbolsWithinSlot->bits_unused = 2;
ss3->monitoringSymbolsWithinSlot->buf[0]=0xc0;
ss3->monitoringSymbolsWithinSlot->buf[1]=0x0;
ss3->nrofCandidates=calloc(1,sizeof(*ss3->nrofCandidates));
ss3->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss3->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
ss3->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1;
ss3->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss3->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss3->searchSpaceType=calloc(1,sizeof(*ss3->searchSpaceType));
ss3->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
ss3->searchSpaceType->choice.common = calloc(1,sizeof(*ss3->searchSpaceType->choice.common));
ss3->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0=calloc(1,sizeof(*ss3->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
ss3->searchSpaceType->choice.common->dci_Format2_0=NULL;
ss3->searchSpaceType->choice.common->dci_Format2_2=NULL;
ss3->searchSpaceType->choice.common->dci_Format2_3=NULL;
ss2->searchSpaceId=2; ss2->searchSpaceId=2;
ss2->controlResourceSetId=calloc(1,sizeof(*ss2->controlResourceSetId)); ss2->controlResourceSetId=calloc(1,sizeof(*ss2->controlResourceSetId));
...@@ -555,8 +532,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco ...@@ -555,8 +532,6 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ss2->searchSpaceType->choice.ue_Specific = calloc(1,sizeof(*ss2->searchSpaceType->choice.ue_Specific)); ss2->searchSpaceType->choice.ue_Specific = calloc(1,sizeof(*ss2->searchSpaceType->choice.ue_Specific));
ss2->searchSpaceType->choice.ue_Specific->dci_Formats=NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0; ss2->searchSpaceType->choice.ue_Specific->dci_Formats=NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0;
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list,
ss3);
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list, ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list,
ss2); ss2);
......
...@@ -59,7 +59,7 @@ gNBs = ...@@ -59,7 +59,7 @@ gNBs =
#initialULBWPmappingType #initialULBWPmappingType
#0=typeA,1=typeB #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0; initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3 #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0;
...@@ -71,6 +71,12 @@ gNBs = ...@@ -71,6 +71,12 @@ gNBs =
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12 #this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54; initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
......
...@@ -59,7 +59,7 @@ gNBs = ...@@ -59,7 +59,7 @@ gNBs =
#initialULBWPmappingType #initialULBWPmappingType
#0=typeA,1=typeB #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0; initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3 #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0;
...@@ -71,6 +71,11 @@ gNBs = ...@@ -71,6 +71,11 @@ gNBs =
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12 #this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54; initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
......
...@@ -59,7 +59,7 @@ gNBs = ...@@ -59,7 +59,7 @@ gNBs =
#initialULBWPmappingType #initialULBWPmappingType
#0=typeA,1=typeB #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0; initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3 #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0;
...@@ -71,6 +71,11 @@ gNBs = ...@@ -71,6 +71,11 @@ gNBs =
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12 #this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54; initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
......
...@@ -59,7 +59,7 @@ gNBs = ...@@ -59,7 +59,7 @@ gNBs =
#initialULBWPmappingType #initialULBWPmappingType
#0=typeA,1=typeB #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0; initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3 #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0;
...@@ -71,6 +71,11 @@ gNBs = ...@@ -71,6 +71,11 @@ gNBs =
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12 #this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54; initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
......
...@@ -59,7 +59,7 @@ gNBs = ...@@ -59,7 +59,7 @@ gNBs =
#initialULBWPmappingType #initialULBWPmappingType
#0=typeA,1=typeB #0=typeA,1=typeB
initialDLBWPmappingType_0 = 0; initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3 #this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40; initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0; initialDLBWPk0_1 = 0;
...@@ -71,6 +71,11 @@ gNBs = ...@@ -71,6 +71,11 @@ gNBs =
initialDLBWPmappingType_2 = 0; initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12 #this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54; initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon #uplinkConfigCommon
#frequencyInfoUL #frequencyInfoUL
ul_frequencyBand = 78; ul_frequencyBand = 78;
......
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