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zzha zzha
OpenXG-RAN
Commits
9e8e7de1
Commit
9e8e7de1
authored
Apr 08, 2020
by
Sakthivel Velumani
Browse files
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Plain Diff
using same dci_pdu_rel15 for UE also
parent
e0acce65
Changes
8
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8 changed files
with
262 additions
and
252 deletions
+262
-252
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
+1
-1
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+2
-1
openair2/LAYER2/NR_MAC_UE/mac_extern.h
openair2/LAYER2/NR_MAC_UE/mac_extern.h
+3
-1
openair2/LAYER2/NR_MAC_UE/mac_proto.h
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+2
-2
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+5
-2
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+243
-242
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+5
-2
No files found.
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @
9e8e7de1
...
...
@@ -92,7 +92,7 @@ typedef struct {
uint8_t
TAGID
:
2
;
// octet 1 [7:6]
}
__attribute__
((
__packed__
))
NR_MAC_CE_TA
;
// DCI pdu structures. Used
in UE by nr_dci_size(but not filled in UE)
// DCI pdu structures. Used
by both gNB and UE.
typedef
struct
{
uint16_t
val
;
uint8_t
nbits
;
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
9e8e7de1
...
...
@@ -609,6 +609,7 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
break
;
case
NR_DL_DCI_FORMAT_1_1
:
// General note: 0 bits condition is ignored as default nbits is 0.
// Format identifier
size
=
1
;
// Carrier indicator
...
...
@@ -647,7 +648,7 @@ uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
num_entries
=
pdsch_config
->
pdsch_TimeDomainAllocationList
->
choice
.
setup
->
list
.
count
;
dci_pdu
->
time_domain_assignment
.
nbits
=
(
int
)
ceil
(
log2
(
num_entries
));
size
+=
dci_pdu
->
time_domain_assignment
.
nbits
;
// VRB to PRB mapping
FIXME (38.212 also says 0 bits if not configured by higher layers
// VRB to PRB mapping
if
(
pdsch_config
->
resourceAllocation
==
1
)
{
dci_pdu
->
vrb_to_prb_mapping
.
nbits
=
1
;
size
+=
dci_pdu
->
vrb_to_prb_mapping
.
nbits
;
...
...
openair2/LAYER2/NR_MAC_UE/mac_extern.h
View file @
9e8e7de1
...
...
@@ -90,4 +90,6 @@ extern const int32_t table_38213_10_1_1_c2[5];
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
extern
uint8_t
table_6_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
];
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
extern
uint8_t
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
];
\ No newline at end of file
extern
uint8_t
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
];
extern
dci_pdu_rel15_t
*
def_dci_pdu_rel15
;
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @
9e8e7de1
...
...
@@ -115,7 +115,7 @@ uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
int8_t
nr_ue_get_SR
(
module_id_t
module_idP
,
int
CC_id
,
frame_t
frameP
,
uint8_t
eNB_id
,
uint16_t
rnti
,
sub_frame_t
subframe
);
int8_t
nr_ue_process_dci
(
module_id_t
module_id
,
int
cc_id
,
uint8_t
gNB_index
,
nr_
dci_pdu_rel15_t
*
dci
,
uint16_t
rnti
,
uint32_t
dci_format
);
int8_t
nr_ue_process_dci
(
module_id_t
module_id
,
int
cc_id
,
uint8_t
gNB_index
,
dci_pdu_rel15_t
*
dci
,
uint16_t
rnti
,
uint32_t
dci_format
);
int
nr_ue_process_dci_indication_pdu
(
module_id_t
module_id
,
int
cc_id
,
int
gNB_index
,
fapi_nr_dci_indication_pdu_t
*
dci
);
uint32_t
get_ssb_frame
(
uint32_t
test
);
...
...
@@ -163,7 +163,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
uint8_t
dci_length
,
uint16_t
rnti
,
uint64_t
*
dci_pdu
,
nr_
dci_pdu_rel15_t
*
nr_pdci_info_extracted
);
dci_pdu_rel15_t
*
nr_pdci_info_extracted
);
int
set_tdd_config_nr_ue
(
fapi_nr_config_request_t
*
cfg
,
int
mu
,
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
9e8e7de1
...
...
@@ -44,6 +44,7 @@
#endif
#define LOG_DCI_PARM(a...) LOG_D(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci)" a)
dci_pdu_rel15_t
*
def_dci_pdu_rel15
;
void
fill_dci_search_candidates
(
NR_SearchSpace_t
*
ss
,
fapi_nr_dl_config_dci_dl_pdu_rel15_t
*
rel15
)
{
...
...
@@ -61,8 +62,10 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
void
ue_dci_configuration
(
NR_UE_MAC_INST_t
*
mac
,
fapi_nr_dl_config_request_t
*
dl_config
,
int
frame
,
int
slot
)
{
def_dci_pdu_rel15
=
calloc
(
1
,
sizeof
(
dci_pdu_rel15_t
));
int
bwp_id
=
1
;
// FIXME
// check if DL slot
dci_pdu_rel15_t
dci_pdu_rel15
;
if
(
is_nr_DL_slot
(
mac
->
scc
,
slot
)
==
1
)
{
// get BWP 1, Coreset 0, SearchSpace 0
...
...
@@ -172,7 +175,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac,fapi_nr_dl_config_request_t *dl_
rel15
->
coreset
.
pdcch_dmrs_scrambling_id
=
*
mac
->
scc
->
physCellId
;
fill_dci_search_candidates
(
mac
->
SSpace
[
0
][
0
][
ss_id
],
rel15
);
rel15
->
dci_format
=
NR_DL_DCI_FORMAT_1_0
;
rel15
->
dci_length
=
nr_dci_size
(
mac
->
scg
,
&
dci_pdu_rel15
,
rel15
->
dci_format
,
NR_RNTI_C
,
rel15
->
BWPSize
);
rel15
->
dci_length
=
nr_dci_size
(
mac
->
scg
,
def_dci_pdu_rel15
,
rel15
->
dci_format
,
NR_RNTI_C
,
rel15
->
BWPSize
,
bwp_id
);
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
pdu_type
=
FAPI_NR_DL_CONFIG_TYPE_DCI
;
dl_config
->
number_pdus
=
dl_config
->
number_pdus
+
1
;
}
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
9e8e7de1
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
9e8e7de1
...
...
@@ -341,7 +341,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
NrOfSymbols
);
dci_pdu_rel15_t
*
dci_pdu_rel15
=
calloc
(
MAX_DCI_CORESET
,
sizeof
(
dci_pdu_rel15
));
dci_pdu_rel15_t
*
dci_pdu_rel15
=
calloc
(
MAX_DCI_CORESET
,
sizeof
(
dci_pdu_rel15
_t
));
// bwp indicator
int
n_dl_bwp
=
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
count
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
9e8e7de1
...
...
@@ -812,7 +812,10 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
int
dci_size
=
nr_dci_size
(
secondaryCellGroup
,
&
dci_pdu_rel15
[
d
],
dci_formats
[
d
],
rnti_types
[
d
],
pdcch_pdu_rel15
->
BWPSize
,
bwp_id
);
pdcch_pdu_rel15
->
PayloadSizeBits
[
d
]
=
dci_size
;
AssertFatal
(
pdcch_pdu_rel15
->
PayloadSizeBits
[
d
]
<=
64
,
"DCI sizes above 64 bits not yet supported"
);
prepare_dci
(
secondaryCellGroup
,
&
dci_pdu_rel15
[
d
],
dci_formats
[
d
],
bwp_id
);
if
(
dci_formats
[
d
]
==
NR_DL_DCI_FORMAT_1_1
)
prepare_dci
(
secondaryCellGroup
,
&
dci_pdu_rel15
[
d
],
dci_formats
[
d
],
bwp_id
);
pos
=
0
;
/// Payload generation
...
...
@@ -1136,7 +1139,7 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
frequency_domain_assignment
.
val
&
((
1
<<
dci_pdu_rel15
->
frequency_domain_assignment
.
nbits
)
-
1
))
<<
(
dci_size
-
pos
);
// Time domain resource assignment
pos
+=
nbits
;
pos
+=
dci_pdu_rel15
->
time_domain_assignment
.
nbits
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
&
((
1
<<
dci_pdu_rel15
->
time_domain_assignment
.
nbits
)
-
1
))
<<
(
dci_size
-
pos
);
// VRB-to-PRB mapping
...
...
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