Commit a0a92f45 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/NR_UE_aperiodic_SRS' into integration_2023_w14

parents 1f6d111f 0de51bcd
...@@ -422,9 +422,6 @@ typedef struct { ...@@ -422,9 +422,6 @@ typedef struct {
typedef struct { typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15; fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
} fapi_nr_dl_config_dci_pdu; } fapi_nr_dl_config_dci_pdu;
typedef struct{
uint8_t aperiodicSRS_ResourceTrigger;
} fapi_nr_dl_srs_config_t;
typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t; typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
...@@ -461,7 +458,6 @@ typedef struct { ...@@ -461,7 +458,6 @@ typedef struct {
uint16_t dmrs_ports; uint16_t dmrs_ports;
uint8_t n_front_load_symb; uint8_t n_front_load_symb;
uint8_t tci_state; uint8_t tci_state;
fapi_nr_dl_srs_config_t srs_config;
uint8_t cbgti; uint8_t cbgti;
uint8_t codeBlockGroupFlushIndicator; uint8_t codeBlockGroupFlushIndicator;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t // to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
......
...@@ -190,6 +190,8 @@ int8_t nr_ue_process_csirs_measurements(module_id_t module_id, frame_t frame, in ...@@ -190,6 +190,8 @@ int8_t nr_ue_process_csirs_measurements(module_id_t module_id, frame_t frame, in
uint32_t get_ssb_frame(uint32_t test); uint32_t get_ssb_frame(uint32_t test);
void nr_ue_aperiodic_srs_scheduling(NR_UE_MAC_INST_t *mac, long resource_trigger, int frame, int slot);
bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
PUCCH_sched_t *pucch, PUCCH_sched_t *pucch,
frame_t frame, frame_t frame,
......
...@@ -538,6 +538,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -538,6 +538,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// - SECOND_DAI // - SECOND_DAI
// - SRS_RESOURCE_IND // - SRS_RESOURCE_IND
/* SRS_REQUEST */
AssertFatal(dci->srs_request.nbits == 2, "If SUL is supported in the cell, there is an additional bit in SRS request field\n");
if(dci->srs_request.val > 0)
nr_ue_aperiodic_srs_scheduling(mac, dci->srs_request.val, frame, slot);
// Schedule PUSCH // Schedule PUSCH
tda_info = get_ul_tda_info(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti), dci->time_domain_assignment.val); tda_info = get_ul_tda_info(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti), dci->time_domain_assignment.val);
if (tda_info.nrOfSymbols == 0) if (tda_info.nrOfSymbols == 0)
...@@ -1076,8 +1081,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1076,8 +1081,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val; dlsch_config_pdu_1_1->tci_state = dci->transmission_configuration_indication.val;
} }
/* SRS_REQUEST */ /* SRS_REQUEST */
// if SUL is supported in the cell, there is an additional bit in this field and the value of this bit represents table 7.1.1.1-1 TS 38.212 FIXME!!! AssertFatal(dci->srs_request.nbits == 2, "If SUL is supported in the cell, there is an additional bit in SRS request field\n");
dlsch_config_pdu_1_1->srs_config.aperiodicSRS_ResourceTrigger = (dci->srs_request.val & 0x11); // as per Table 7.3.1.1.2-24 TS 38.212 if(dci->srs_request.val > 0 )
nr_ue_aperiodic_srs_scheduling(mac, dci->srs_request.val, frame, slot);
/* CBGTI */ /* CBGTI */
dlsch_config_pdu_1_1->cbgti = dci->cbgti.val; dlsch_config_pdu_1_1->cbgti = dci->cbgti.val;
/* CBGFI */ /* CBGFI */
......
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