Commit ad2667fb authored by Raymond Knopp's avatar Raymond Knopp

Testing of NR PDCCH/PDSCH with RRC Configuration. added RRC configuration to...

Testing of NR PDCCH/PDSCH with RRC Configuration. added RRC configuration to NR UE. Updates to UE DCI procedures (moved to MAC) and updates to FAPI interfaces for UE. nr_dlsim is functional, added profiling information for gNB TX.
parent 6bf81627
......@@ -1205,7 +1205,6 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_ul_ref.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c
${OPENAIR1_DIR}/PHY/CODING/nr_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
......@@ -1646,6 +1645,7 @@ set (MAC_NR_SRC_UE
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
${NR_UE_MAC_DIR}/nr_ue_dci_configuration.c
)
set (ENB_APP_SRC
......@@ -1700,7 +1700,7 @@ add_dependencies(L2_UE rrc_flag s1ap_flag x2_flag)
add_library( NR_L2_UE ${NR_L2_SRC_UE} ${MAC_NR_SRC_UE} )
add_library( MAC_NR_COMMON ${OPENAIR2_DIR}/LAYER2/NR_MAC_gNB/nr_mac_common.c )
add_library( MAC_NR_COMMON ${OPENAIR2_DIR}/LAYER2/NR_MAC_gNB/nr_mac_common.c ${OPENAIR2_DIR}/LAYER2/NR_MAC_gNB/nr_compute_tbs_common.c)
include_directories("${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE")
include_directories("${OPENAIR2_DIR}/LAYER2/NR_MAC_UE")
......
......@@ -37,8 +37,8 @@ int NRRIV2BW(int locationAndBandwidth,int N_RB) {
int tmp = locationAndBandwidth/N_RB;
int tmp2 = locationAndBandwidth%N_RB;
if (tmp <= (N_RB-tmp2+1)) return(tmp);
else return(N_RB-tmp);
if (tmp <= ((N_RB>>1)-tmp2+1)) return(tmp+1);
else return(N_RB+1-tmp);
}
......@@ -46,15 +46,14 @@ int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB) {
int tmp = locationAndBandwidth/N_RB;
int tmp2 = locationAndBandwidth%N_RB;
if (tmp <= (N_RB-tmp2+1)) return(tmp2);
else return(N_RB-tmp2);
if (tmp <= ((N_RB>>1)-tmp2+1)) return(tmp2);
else return(N_RB-1-tmp2);
}
int PRBalloc_to_locationandbandwidth0(int NPRB,int RBstart,int BWPsize) {
if (NPRB < 138)
return(BWPsize*(NPRB-1)+RBstart);
else
return(BWPsize*(BWPsize+1-NPRB) + (BWPsize-1-RBstart));
AssertFatal(NPRB>0 && (NPRB + RBstart <= BWPsize),"Illegal NPRB/RBstart Configuration (%d,%d)\n",NPRB,RBstart);
if (NPRB <= 1+(BWPsize>>1)) return(BWPsize*(NPRB-1)+RBstart);
else return(BWPsize*(BWPsize+1-NPRB) + (BWPsize-1-RBstart));
}
int PRBalloc_to_locationandbandwidth(int NPRB,int RBstart) {
......
......@@ -45,3 +45,21 @@ uint8_t nr_get_Qm(uint8_t Imcs, uint8_t table_idx);
uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
int get_subband_size(int NPRB,int size);
void SLIV2SL(int SLIV,int *S,int *L);
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
#define cmax(a,b) ((a>b) ? (a) : (b))
#define cmax3(a,b,c) ((cmax(a,b)>c) ? (cmax(a,b)) : (c))
#define cmin(a,b) ((a<b) ? (a) : (b))
#ifdef __cplusplus
#ifdef min
#undef min
#undef max
#endif
#else
#define max(a,b) cmax(a,b)
#define min(a,b) cmin(a,b)
#endif
......@@ -8,6 +8,9 @@
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
// Constants Defined in 38.213
#define FAPI_NR_MAX_CORESET_PER_BWP 3
#define FAPI_NR_MAX_SS_PER_CORESET 10
/// RX_IND
......@@ -41,8 +44,8 @@
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
#define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
......
......@@ -31,77 +31,7 @@
typedef signed char int8_t;
*/
typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} fapi_nr_dci_pdu_rel15_t;
......@@ -120,16 +50,14 @@ typedef struct {
typedef struct {
/// frequency_domain_resource;
//uint32_t rb_start;
//uint32_t rb_end;
uint64_t frequency_domain_resource;
uint16_t rb_offset;
uint8_t frequency_domain_resource[6];
uint8_t StartSymbolIndex;
uint8_t duration;
uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
uint8_t cce_reg_interleaved_reg_bundle_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
uint8_t CceRegMappingType; // interleaved or noninterleaved
uint8_t RegBundleSize; // valid if CCE to REG mapping type is interleaved type
uint8_t InterleaverSize; // valid if CCE to REG mapping type is interleaved type
uint8_t ShiftIndex; // valid if CCE to REG mapping type is interleaved type
uint8_t CoreSetType;
uint8_t precoder_granularity;
uint16_t pdcch_dmrs_scrambling_id;
......@@ -154,13 +82,16 @@ typedef struct {
int n_CCE;
// N_CCE is L, or number of CCEs for DCI
int N_CCE;
fapi_nr_dci_pdu_rel15_t dci;
uint8_t payloadSize;
uint8_t payloadBits[16];
//fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t;
///
typedef struct {
uint32_t sfn_slot;
uint16_t SFN;
uint8_t slot;
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t dci_list[10];
} fapi_nr_dci_indication_t;
......@@ -381,16 +312,15 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint16_t BWPSize;
uint16_t BWPStart;
uint8_t SubcarrierSpacing;
fapi_nr_coreset_t coreset;
uint16_t N_RB_BWP;
uint32_t duration;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint16_t monitoring_symbols_within_slot;
// DCI foramt-specific
uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t format_2_3_monitorying_periodicity;
uint8_t format_2_3_number_of_candidates;
uint8_t number_of_candidates;
uint16_t CCE[64];
uint8_t L[64];
uint8_t dci_length;
uint8_t dci_format;
} fapi_nr_dl_config_dci_dl_pdu_rel15_t;
typedef struct {
......@@ -403,12 +333,16 @@ typedef struct{
typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint8_t bandwidth_part_ind;
uint16_t BWPSize;
uint16_t BWPStart;
uint8_t SubcarrierSpacing;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
uint16_t dlDmrsSymbPos;
uint8_t dmrsConfigType;
uint8_t prb_bundling_size_ind;
uint8_t rate_matching_ind;
uint8_t zp_csi_rs_trigger;
......
......@@ -188,7 +188,8 @@ void nr_polar_print_polarParams(t_nrPolar_params *polarParams);
t_nrPolar_params *nr_polar_params (int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level,
int decoder_flag);
int decoder_flag,
t_nrPolar_params **polarList_ext);
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level);
......
......@@ -185,10 +185,12 @@ void nr_polar_print_polarParams(t_nrPolar_params *polarParams) {
t_nrPolar_params *nr_polar_params (int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level,
int decoding_flag) {
int decoding_flag,
t_nrPolar_params **polarList_ext) {
static t_nrPolar_params *polarList = NULL;
nr_polar_init(&polarList, messageType,messageLength,aggregation_level,decoding_flag);
t_nrPolar_params *polarParams=polarList;
nr_polar_init(polarList_ext != NULL ? polarList_ext : &polarList,
messageType,messageLength,aggregation_level,decoding_flag);
t_nrPolar_params *polarParams=polarList_ext != NULL ? *polarList_ext : polarList;
const int tag=messageType * messageLength * nr_polar_aggregation_prime(aggregation_level);
while (polarParams != NULL) {
......
......@@ -63,7 +63,7 @@ int32_t nr_segmentation(unsigned char *input_buffer,
#endif
}
if ((*C)>MAX_NUM_DLSCH_SEGMENTS) {
if ((*C)>MAX_NUM_NR_DLSCH_SEGMENTS) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d, L %d, Bprime %d\n",*C,B,L,Bprime);
return(-1);
}
......
......@@ -86,14 +86,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
int i;
int P=cfg->carrier_config.num_tx_ant.value;
int Ptx=cfg->carrier_config.num_tx_ant.value;
int Prx=cfg->carrier_config.num_rx_ant.value;
AssertFatal(P>0 && P<9,"P %d is not supported\n",P);
AssertFatal(Ptx>0 && Ptx<9,"Ptx %d is not supported\n",Ptx);
AssertFatal(Prx>0 && Prx<9,"Prx %d is not supported\n",Prx);
LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured\n", gNB->Mod_id, __FUNCTION__);
gNB->total_dlsch_bitrate = 0;
gNB->total_transmitted_bits = 0;
gNB->total_system_throughput = 0;
gNB->check_for_MUMIMO_transmissions=0;
while(gNB->configured == 0) usleep(10000);
......@@ -157,21 +155,24 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
gNB->first_run_I0_measurements =
1; ///This flag used to be static. With multiple gNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here.
common_vars->rxdata = (int32_t **)malloc16(P*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(P*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(P*sizeof(int32_t*));
gNB->first_run_I0_measurements = 1;
for (i=0;i<P;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->rxdata[i] = (int32_t*)malloc16_clear(fp->samples_per_frame*sizeof(int32_t));
common_vars->rxdata = (int32_t **)malloc16(Prx*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(Ptx*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(Prx*sizeof(int32_t*));
for (i=0;i<Ptx;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
}
for (i=0;i<Prx;i++){
common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
common_vars->rxdata[i] = (int32_t*)malloc16_clear(fp->samples_per_frame*sizeof(int32_t));
}
// Channel estimates for SRS
/*
......@@ -202,22 +203,24 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
printf("Before ULSCH init : %p\n",gNB->dlsch[0][0]->harq_processes[0]);
for (int ULSCH_id=0; ULSCH_id<NUMBER_OF_NR_ULSCH_MAX; ULSCH_id++) {
printf("ULSCH_id %d : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id] = (NR_gNB_PUSCH *)malloc16_clear( sizeof(NR_gNB_PUSCH) );
pusch_vars[ULSCH_id]->rxdataF_ext = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_ext2 = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_time = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_comp = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag0 = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb0 = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16( fp->nb_antennas_rx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
for (i=0; i<fp->nb_antennas_rx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_ext2 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_estimates_time = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rxdataF_comp = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag0 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb0 = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16(Prx*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear(Prx*sizeof(int32_t*) );
printf("ULSCH_id %d (before rx antenna alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
for (i=0; i<Prx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
......@@ -230,14 +233,15 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
}
pusch_vars[ULSCH_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
printf("ULSCH_id %d (before llr alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
pusch_vars[ULSCH_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
printf("ULSCH_id %d (after llr alloc) : %p\n",ULSCH_id,gNB->dlsch[0][0]->harq_processes[0]);
} //ulsch_id
/*
for (ulsch_id=0; ulsch_id<NUMBER_OF_UE_MAX; ulsch_id++)
gNB->UE_stats_ptr[ulsch_id] = &gNB->UE_stats[ulsch_id];
*/
gNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration
printf("After ULSCH init : %p\n",gNB->dlsch[0][0]->harq_processes[0]);
return (0);
}
......@@ -249,9 +253,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH *const prach_vars = &gNB->prach_vars;*/
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int P=gNB->gNB_config.carrier_config.num_tx_ant.value;
int Ptx=gNB->gNB_config.carrier_config.num_tx_ant.value;
for (int i = 0; i < P; i++) {
for (int i = 0; i < Ptx; i++) {
free_and_zero(common_vars->txdataF[i]);
/* rxdataF[i] is not allocated -> don't free */
}
......@@ -440,14 +444,7 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
for (j=0; j<2; j++) {
gNB->dlsch[i][j] = new_gNB_dlsch(fp,1,16,NSOFT,0,grid_size);
if (!gNB->dlsch[i][j]) {
LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i);
exit(-1);
}/* else {
gNB->dlsch[i][j]->rnti=0;
LOG_D(PHY,"dlsch[%d][%d] => %p rnti:%d\n",i,j,gNB->dlsch[i][j], gNB->dlsch[i][j]->rnti);
}*/
AssertFatal(gNB->dlsch[i][j]!=NULL,"Can't initialize dlsch %d \n", i);
}
}
......
......@@ -82,7 +82,7 @@ int nr_phy_init_RU(RU_t *ru) {
// allocate precoding input buffers (TX)
ru->common.txdataF = (int32_t **)malloc16(ru->nb_tx**sizeof(int32_t*));
ru->common.txdataF = (int32_t **)malloc16(ru->nb_tx*sizeof(int32_t*));
for(i=0; i< ru->nb_tx; ++i) ru->common.txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
// allocate IFFT input buffers (TX)
......@@ -126,7 +126,7 @@ int nr_phy_init_RU(RU_t *ru) {
int l_ind = 0;
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<nb_logical_antennas;p++) {
for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> p) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
......
......@@ -51,9 +51,10 @@ void nr_modulation(uint32_t *in,
}
void nr_layer_mapping(int16_t **mod_symbs,
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers) {
uint8_t n_layers,
uint16_t n_symbs,
int16_t **tx_layers) {
LOG_D(PHY,"Doing layer mapping for %d layers, %d symbols\n",n_layers,n_symbs);
switch (n_layers) {
......
......@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1)) + (Nid<<1);
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
......@@ -91,6 +91,7 @@ void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2);
for (uint32_t n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
......
......@@ -100,7 +100,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
x2 = x2 ^ (x2<<31) ^ (x2<<30) ^ (x2<<29) ^ (x2<<28);
ue->nr_gold_pdcch[0][ns][l][n] = x1^x2;
//printf("n=%d : c %x\n",n,x1^x2);
// if (ns==1 && l==0) printf("n=%d : c %x\n",n,x1^x2);
}
}
}
......@@ -133,7 +133,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
x2tmp0 = ((14*ns+(lbar+l)+1)*((nid<<1)+1))<<17;
x2 = (x2tmp0+(nid<<1)+nscid)%(1<<31); //cinit
LOG_D(PHY,"UE DMRS slot %d, symb %d, lbar %d, x2 %x, nscid %d\n",ns,l,lbar,x2,nscid);
//printf("ns %d gold pdsch x2 %d\n",ns,x2);
x1 = 1+ (1<<31);
......
......@@ -137,7 +137,6 @@ void nr_pdcch_scrambling(uint32_t *in,
uint32_t x1, x2, s=0;
reset = 1;
x2 = (n_RNTI<<16) + Nid;
for (int i=0; i<size; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
......@@ -150,10 +149,10 @@ void nr_pdcch_scrambling(uint32_t *in,
}
(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
//printf("nr_pdcch_scrambling: in %d seq 0x%08x => out %d\n",((*in)>>(i&0x1f))&1,s,((*out)>>(i&0x1f))&1);
}
}
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
......@@ -165,9 +164,6 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
uint16_t cset_start_sc;
uint8_t cset_start_symb, cset_nsymb;
int k,l,k_prime,dci_idx, dmrs_idx;
nr_cce_t cce;
nr_reg_t reg;
nr_reg_t reg_mapping_list[NR_MAX_PDCCH_AGG_LEVEL*NR_NB_REG_PER_CCE];
/*First iteration: single DCI*/
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15;
......@@ -202,13 +198,15 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
dci_idx = 0;
LOG_D(PHY, "Coreset rb_offset %d\n",rb_offset);
LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol
uint32_t dmrs_length = (pdcch_pdu_rel15->precoderGranularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS)?
AssertFatal(pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED,
"Interleaved CCE REG MAPPING not supported\n");
uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
(n_rb*6) : (pdcch_pdu_rel15->AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = pdcch_pdu_rel15->AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d\n", dmrs_length, encoded_length);
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
/// DMRS QPSK modulation
......@@ -234,12 +232,12 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE,
pdcch_pdu_rel15->PayloadSizeBits[d],
pdcch_pdu_rel15->AggregationLevel[d],
0);
polar_encoder_fast((uint64_t*)pdcch_pdu_rel15->Payload[d], encoder_output, pdcch_pdu_rel15->RNTI[d],1,currentPtr);
0,NULL);
polar_encoder_fast((uint64_t*)pdcch_pdu_rel15->Payload[d], encoder_output, n_RNTI,1,currentPtr);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_pdu_rel15->RNTI[d]);
printf("polar rnti %x,length %d, L %d\n",n_RNTI, pdcch_pdu_rel15->PayloadSizeBits[d],pdcch_pdu_rel15->AggregationLevel[d]);
printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
pdcch_pdu.Payload[d][0], pdcch_pdu.Payload[d][1]);
((uint64_t*)pdcch_pdu_rel15->Payload[d])[0], ((uint64_t*)pdcch_pdu_rel15->Payload[d])[1]);
printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
for (int i=0; i<encoded_length>>5; i++)
......@@ -274,74 +272,30 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
/*Reorder REG list for a freq first mapping*/
uint8_t nb_regs = pdcch_pdu_rel15->AggregationLevel[d]*NR_NB_REG_PER_CCE;
/*
for (int cce_idx=pdcch_pdu_rel15->CceIndex;
cce_idx<(pdcch_pdu_rel15->CceIndex+pdcch_pdu_rel15->AggregationLevel[d]);
cce_idx++) {
cce = gNB->cce_list[cce_idx];
for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
reg = cce.reg_list[reg_idx];
reg_mapping_list[reg_idx+cce_idx*NR_NB_REG_PER_CCE] = reg;
}
}
*/
if (pdcch_pdu_rel15->precoderGranularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
/*in this case the DMRS are mapped on all the coreset*/
for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = 0;
else
dmrs_idx = rb_offset*3;
k = cset_start_sc + 1;
while (dmrs_idx<3*n_rb) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
dmrs_idx++;
}
}
}
/*Now mapping the encoded DCI based on newly constructed REG list
* and the DMRS for the precoder granularity same as REG bundle*/
/*Mapping the encoded DCI along with the DMRS */
for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) {
reg = reg_mapping_list[reg_idx];
k = cset_start_sc + reg.start_sc_idx;
k = cset_start_sc + (12*reg_idx/cset_nsymb);
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + reg.symb_idx;
l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb);
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
dmrs_idx = (reg_idx/cset_nsymb)*3;
else
dmrs_idx = ((reg.reg_idx/cset_nsymb)+rb_offset)*3;
dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_pdu_rel15->precoderGranularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp>>1) * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp>>1) * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (2*amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (2*amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
......@@ -352,7 +306,7 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dci_idx++;
......
......@@ -32,7 +32,7 @@
#include "nr_dci.h"
#define DEBUG_FILL_DCI
//#define DEBUG_FILL_DCI
#include "nr_dlsch.h"
......
......@@ -76,7 +76,14 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
int xOverhead,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats) {
time_stats_t *dlsch_modulation_stats,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats) {
int harq_pid = 0;
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[harq_pid];
......@@ -85,15 +92,23 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
int8_t Wf[2], Wt[2], l0, l_prime[2], delta;
uint16_t nb_symbols = rel15->NrOfSymbols;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_symbols*Qm;
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs = (dmrs_Type== NFAPI_NR_DMRS_TYPE1) ? 6:4;
uint16_t n_dmrs = ((rel15->rbSize+rel15->rbStart)*nb_re_dmrs)<<1;
int16_t mod_dmrs[n_dmrs<<1];
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
start_meas(dlsch_encoding_stats);
nr_dlsch_encoding(harq->pdu, frame, slot, dlsch, frame_parms);
nr_dlsch_encoding(harq->pdu, frame, slot, dlsch, frame_parms,tinput,tprep,tparity,toutput,
dlsch_rate_matching_stats,
dlsch_interleaving_stats,
dlsch_segmentation_stats);
stop_meas(dlsch_encoding_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
......@@ -111,6 +126,8 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
printf("\n");
#endif
/// scrambling
start_meas(dlsch_scrambling_stats);
for (int q=0; q<rel15->NrOfCodewords; q++)
......@@ -142,8 +159,8 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
mod_symbs[q]);
stop_meas(dlsch_modulation_stats);
#ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_symbols);
for (int i=0; i<nb_symbols>>3; i++) {
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_re);
for (int i=0; i<nb_re>>3; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_symbs[0][((i<<3)+j)<<1], mod_symbs[0][(((i<<3)+j)<<1)+1]);
}
......@@ -155,53 +172,50 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
/// Layer mapping
nr_layer_mapping(mod_symbs,
rel15->nrOfLayers,
nb_symbols,
nb_re,
tx_layers);
#ifdef DEBUG_DLSCH
printf("Layer mapping (%d layers):\n", rel15->nrOfLayers);
for (int l=0; l<rel15->nrOfLayers; l++)
for (int i=0; i<(nb_symbols/rel15->nrOfLayers)>>3; i++) {
for (int i=0; i<(nb_re/rel15->nrOfLayers)>>3; i++) {
printf("layer %d, Re %d..%d : ",l,i<<3,(i<<3)+7);
for (int j=0; j<8; j++) {
printf("%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
printf("l%d %d\t", tx_layers[l][((i<<3)+j)<<1], tx_layers[l][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
/// Antenna port mapping
//to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
//to be moved to init phase potentially, for now tx_layers 1-8 are mapped on antenna ports 1000-1007
/// DMRS QPSK modulation
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs = (dmrs_Type==1) ? 6:4;
uint16_t n_dmrs = ((rel15->rbSize+rel15->rbStart)*nb_re_dmrs)<<1;
int16_t mod_dmrs[n_dmrs<<1];
l0 = get_l0(rel15->dlDmrsSymbPos);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
l0 = get_l0(rel15->dlDmrsSymbPos);
nr_modulation(pdsch_dmrs[l0][0], n_dmrs, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs>>1, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
printf("DMRS modulation (single symbol %d, %d symbols, type %d):\n", l0, n_dmrs>>1, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
printf("\n");
}
#endif
/// Resource mapping
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms->first_carrier_offset + rel15->rbStart*NR_NB_SC_PER_RB;
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, rel15->NrOfSymbols);
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_re %d,nb_layers %d)\n",
start_sc, rel15->StartSymbolIndex, rel15->rbSize, nb_re,rel15->nrOfLayers);
#endif
for (int ap=0; ap<rel15->nrOfLayers; ap++) {
......@@ -212,8 +226,8 @@ for (int i=0; i<n_dmrs>>4; i++) {
l_prime[0] = 0; // single symbol ap 0
uint8_t dmrs_symbol = l0+l_prime[0];
#ifdef DEBUG_DLSCH_MAPPING
printf("DMRS params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
printf("DMRS Type %d params for ap %d: Wt %d %d \t Wf %d %d \t delta %d \t l_prime %d \t l0 %d\tDMRS symbol %d\n",
1+dmrs_Type,ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
#endif
uint8_t k_prime=0;
uint16_t m=0, n=0, dmrs_idx=0, k=0;
......
......@@ -79,7 +79,14 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
int xOverhead,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats);
time_stats_t *dlsch_modulation_stats,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats);
void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
......@@ -91,9 +98,16 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch);
int16_t find_nr_dlsch(uint16_t rnti, PHY_VARS_gNB *gNB,find_type_t type);
int nr_dlsch_encoding(unsigned char *a,int frame,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms);
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms,
time_stats_t *tinput,
time_stats_t *tprep,
time_stats_t *tparity,
time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats);
void nr_emulate_dlsch_payload(uint8_t* payload, uint16_t size);
......
......@@ -70,7 +70,7 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
#endif
if (dlsch->harq_processes[i]->b) {
free16(dlsch->harq_processes[i]->b,MAX_DLSCH_PAYLOAD_BYTES); //this should be MAX_NR_DLSCH_PAYLOAD_BYTES
free16(dlsch->harq_processes[i]->b,MAX_NR_DLSCH_PAYLOAD_BYTES); //this should be MAX_NR_DLSCH_PAYLOAD_BYTES
dlsch->harq_processes[i]->b = NULL;
#ifdef DEBUG_DLSCH_FREE
LOG_D(PHY,"Freeing dlsch process %d b (%p)\n",i,dlsch->harq_processes[i]->b);
......@@ -81,7 +81,7 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
LOG_D(PHY,"Freeing dlsch process %d c (%p)\n",i,dlsch->harq_processes[i]->c);
#endif
for (r=0; r<MAX_NUM_DLSCH_SEGMENTS; r++) {
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS; r++) {
#ifdef DEBUG_DLSCH_FREE
LOG_D(PHY,"Freeing dlsch process %d c[%d] (%p)\n",i,r,dlsch->harq_processes[i]->c[r]);
......@@ -121,17 +121,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
int re;
unsigned char bw_scaling =1;
switch (N_RB) {
case 106:
bw_scaling =2;
break;
default:
bw_scaling =1;
break;
}
if (N_RB <= 107) bw_scaling =2;
dlsch = (NR_gNB_DLSCH_t *)malloc16(sizeof(NR_gNB_DLSCH_t));
if (dlsch) {
......@@ -260,7 +251,7 @@ void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
dlsch->harq_processes[i]->round = 0;
for (j=0; j<96; j++)
for (r=0; r<MAX_NUM_DLSCH_SEGMENTS; r++)
for (r=0; r<MAX_NUM_NR_DLSCH_SEGMENTS; r++)
if (dlsch->harq_processes[i]->d[r])
dlsch->harq_processes[i]->d[r][j] = NR_NULL;
......@@ -273,7 +264,10 @@ int nr_dlsch_encoding(unsigned char *a,
int frame,
uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms)
NR_DL_FRAME_PARMS* frame_parms,
time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput,
time_stats_t *dlsch_rate_matching_stats,time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats)
{
unsigned int G;
......@@ -293,7 +287,7 @@ int nr_dlsch_encoding(unsigned char *a,
uint32_t E;
uint8_t Ilbrm = 1;
uint32_t Tbslbrm = 950984; //max tbs
uint8_t nb_re_dmrs = rel15->dmrsConfigType==1 ? 6:4;
uint8_t nb_re_dmrs = rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1 ? 6:4;
uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t R=rel15->targetCodeRate[0];
float Coderate = 0.0;
......@@ -339,7 +333,7 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->B = A+24;
// dlsch->harq_processes[harq_pid]->b = a;
AssertFatal((A/8)+4 <= MAX_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_DLSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+3 <= MAX_NR_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_NR_DLSCH_PAYLOAD_BYTES);
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+4); // why is this +4 if the CRC is only 3 bytes?
}
......@@ -354,7 +348,7 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->B = A+16;
// dlsch->harq_processes[harq_pid]->b = a;
AssertFatal((A/8)+3 <= MAX_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_DLSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+3 <= MAX_NR_DLSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_NR_DLSCH_PAYLOAD_BYTES);
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+3); // using 3 bytes to mimic the case of 24 bit crc
}
......@@ -368,6 +362,7 @@ int nr_dlsch_encoding(unsigned char *a,
else
BG = 1;
start_meas(dlsch_segmentation_stats);
Kb = nr_segmentation(dlsch->harq_processes[harq_pid]->b,
dlsch->harq_processes[harq_pid]->c,
dlsch->harq_processes[harq_pid]->B,
......@@ -376,7 +371,7 @@ int nr_dlsch_encoding(unsigned char *a,
Zc,
&dlsch->harq_processes[harq_pid]->F,
BG);
stop_meas(dlsch_segmentation_stats);
F = dlsch->harq_processes[harq_pid]->F;
Kr = dlsch->harq_processes[harq_pid]->K;
......@@ -405,7 +400,9 @@ int nr_dlsch_encoding(unsigned char *a,
}
for(int j=0;j<(dlsch->harq_processes[harq_pid]->C/8+1);j++) {
ldpc_encoder_optim_8seg_multi(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,*Zc,Kb,Kr,BG,dlsch->harq_processes[harq_pid]->C,j,NULL,NULL,NULL,NULL);
ldpc_encoder_optim_8seg_multi(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,*Zc,Kb,Kr,BG,
dlsch->harq_processes[harq_pid]->C,j,
tinput,tprep,tparity,toutput);
}
......@@ -446,6 +443,7 @@ int nr_dlsch_encoding(unsigned char *a,
Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl,dlsch->harq_processes[harq_pid]->C);
start_meas(dlsch_rate_matching_stats);
nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
BG,
......@@ -455,17 +453,18 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->C,
rel15->rvIndex[0],
E);
stop_meas(dlsch_rate_matching_stats);
#ifdef DEBUG_DLSCH_CODING
for (int i =0; i<16; i++)
LOG_D(PHY,"output ratematching e[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->e[i+r_offset], r_offset);
#endif
nr_interleaving_ldpc(E,
mod_order,
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->f+r_offset);
start_meas(dlsch_interleaving_stats);
nr_interleaving_ldpc(E,
mod_order,
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->f+r_offset);
stop_meas(dlsch_interleaving_stats);
#ifdef DEBUG_DLSCH_CODING
for (int i =0; i<16; i++)
......
......@@ -299,7 +299,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// CRC, coding and rate matching
polar_encoder_fast (&a_reversed, (uint32_t *)pbch->pbch_e, 0, 0,
nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,0)
nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,0,NULL)
);
#ifdef DEBUG_PBCH_ENCODING
printf("Channel coding:\n");
......
......@@ -36,9 +36,6 @@
#include "PHY/defs_nr_common.h"
#define MAX_NUM_NR_DLSCH_SEGMENTS 16
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
#define NR_PUSCH_x 2 // UCI placeholder bit TS 38.212 V15.4.0 subclause 5.3.3.1
#define NR_PUSCH_y 3 // UCI placeholder bit
......
......@@ -1728,41 +1728,6 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
uint64_t dci_pdu[2],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint8_t beamforming_mode,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted);
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
PDSCH_t type,
unsigned char eNB_id,
......@@ -1789,20 +1754,5 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t is_crnti,
uint8_t llr8_flag);
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
uint64_t dci_pdu[2],
fapi_nr_dci_pdu_rel15_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DCI_format_t dci_format,
uint8_t nr_tti_rx,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
/**@}*/
#endif
......@@ -475,7 +475,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset)
{
int pilot[200] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned int pilot_cnt;
......@@ -484,12 +484,9 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = 1;
ue->frame_parms.nushift = nushift;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ;
......@@ -510,14 +507,15 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fr = filt16a_r1;
// generate pilot
// generate pilot
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];
dl_ch = (int16_t *)&dl_ch_estimates[aarx][ch_offset];
memset(dl_ch,0,4*(ue->frame_parms.ofdm_symbol_size));
......@@ -588,7 +586,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
if (k >= ue->frame_parms.ofdm_symbol_size){
k-=ue->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+nushift)];}
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+k+1)];}
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
......@@ -622,7 +620,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PDCCH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+2,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
#endif
multadd_real_vector_complex_scalar(fr,
......
This diff is collapsed.
This diff is collapsed.
......@@ -101,16 +101,16 @@ static void nr_dlsch_layer_demapping(int16_t **llr_cw,
int16_t **llr_layers);
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid)
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid)
{
NR_UE_COMMON *common_vars = &ue->common_vars;
......@@ -151,7 +151,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//int16_t *pllr_symbol_cw1_deint;
uint32_t llr_offset_symbol;
//uint16_t bundle_L = 2;
uint8_t l0 =2, pilots=0;
uint8_t pilots=0;
uint16_t n_tx=1, n_rx=1;
int32_t median[16];
uint32_t len;
......@@ -234,7 +234,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_rb = dlsch0_harq->start_rb;
nb_rb_pdsch = dlsch0_harq->nb_rb;
l0 = dlsch0_harq->start_symbol;
int lbar;
DevAssert(dlsch0_harq);
round = dlsch0_harq->round;
......@@ -286,7 +286,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
printf("Demod dlsch0_harq->pmi_alloc %d\n", dlsch0_harq->pmi_alloc);
#endif
pilots = (symbol==l0) ? 1 : 0;
pilots = ((1<<symbol)&dlsch0_harq->dlDmrsSymbPos)>0 ? 1 : 0;
if (frame_parms->nb_antenna_ports_eNB>1 && beamforming_mode==0) {
#ifdef DEBUG_DLSCH_MOD
......@@ -297,19 +297,19 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
nb_rb = nr_dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
#ifdef DEBUG_DLSCH_MOD
printf("dlsch: using pmi %lx, pmi_ext ",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
for (rb=0;rb<nb_rb;rb++)
......@@ -352,18 +352,18 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
} else if (beamforming_mode==0) { //else if nb_antennas_ports_eNB==1 && beamforming_mode == 0
//printf("start nr dlsch extract nr_tti_rx %d thread id %d \n", nr_tti_rx, ue->current_thread_id[nr_tti_rx]);
nb_rb = nr_dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms);
pdsch_vars[eNB_id]->dl_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms);
} /*else if(beamforming_mode>7) {
LOG_W(PHY,"dlsch_demodulation: beamforming mode not supported yet.\n");
......@@ -375,7 +375,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
return(-1);
}
len = (symbol==l0)? (nb_rb*6):(nb_rb*12);
len = (pilots==1)? (nb_rb*6):(nb_rb*12);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
......@@ -395,11 +395,11 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
n_rx = frame_parms->nb_antennas_rx;
nr_dlsch_scale_channel(pdsch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
dlsch,
symbol,
pilots,
nb_rb);
frame_parms,
dlsch,
symbol,
pilots,
nb_rb);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
......@@ -648,13 +648,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
// compute LLRs
// -> // compute @pointer where llrs should filled for this ofdm-symbol
pdsch_vars[eNB_id]->llr_offset[l0-1] = 0;
if (first_symbol_flag==1) pdsch_vars[eNB_id]->llr_offset[symbol-1] = 0;
llr_offset_symbol = pdsch_vars[eNB_id]->llr_offset[symbol-1];
//pllr_symbol_cw0_deint = (int8_t*)pdsch_vars[eNB_id]->llr[0];
//pllr_symbol_cw1_deint = (int8_t*)pdsch_vars[eNB_id]->llr[1];
......@@ -1788,11 +1789,11 @@ void nr_dlsch_channel_compensation_core(int **rxdataF_ext,
void nr_dlsch_scale_channel(int **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t **dlsch_ue,
uint8_t symbol,
uint8_t pilots,
unsigned short nb_rb)
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t **dlsch_ue,
uint8_t symbol,
uint8_t pilots,
unsigned short nb_rb)
{
#if defined(__x86_64__)||defined(__i386__)
......@@ -1808,7 +1809,7 @@ void nr_dlsch_scale_channel(int **dl_ch_estimates_ext,
// Determine scaling amplitude based the symbol
ch_amp = 1024*8; //((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
ch_amp = 1024*8; //((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
LOG_D(PHY,"Scaling PDSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n",symbol,ch_amp,pilots,nb_rb,frame_parms->Ncp,symbol);
// printf("Scaling PDSCH Chest in OFDM symbol %d by %d\n",symbol_mod,ch_amp);
......
......@@ -538,7 +538,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint32_t unscrambling_mask = (Lmax==64)?0x100006D:0x1000041;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0);
//polar decoding de-rate matching
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,1);
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,1,ue->polarList);
decoderState = polar_decoder_int16(pbch_e_rx,(uint64_t *)&nr_ue_pbch_vars->pbch_a_prime,0,currentPtr);
if(decoderState) return(decoderState);
......
......@@ -1113,6 +1113,7 @@ void *nr_dlsch_decoding_2thread0(void *arg);
void *nr_dlsch_decoding_2thread1(void *arg);
void nr_dlsch_unscrambling(int16_t* llr,
uint32_t size,
uint8_t q,
......@@ -1124,17 +1125,10 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
PDSCH_t dlsch_id,
uint8_t eNB_id);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t is_secondary_ue,
int nb_coreset_active,
uint16_t symbol_mon,
NR_SEARCHSPACE_TYPE_t searchSpaceType);
uint32_t slot);
/*! \brief Extract PSS and SSS resource elements
@param phy_vars_ue Pointer to UE variables
......@@ -1544,10 +1538,9 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME
void pdcch_interleaving(NR_DL_FRAME_PARMS *frame_parms,int32_t **z, int32_t **wbar,uint8_t n_symbols_pdcch,uint8_t mi);
void pdcch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
int8_t* llr,
uint32_t length);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t slot,
int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id);
......@@ -1711,46 +1704,14 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t nr_tti_rx,
int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
uint64_t dci_pdu[2],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint8_t beamforming_mode,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame,
int slot,
fapi_nr_dci_indication_t *dci_ind);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
- RB extraction (signal and channel estimates)
......@@ -1794,22 +1755,11 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t is_crnti,
uint8_t llr8_flag);
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
uint64_t dci_pdu[2],
fapi_nr_dci_pdu_rel15_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DCI_format_t dci_format,
uint8_t nr_tti_rx,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe, uint16_t Nf );
void *dlsch_thread(void *arg);
/**@}*/
#endif
......@@ -255,8 +255,6 @@ typedef struct {
uint8_t DCINdi;
/// DLSCH status flag indicating
SCH_status_t status;
/// Dynamic Configuration from FAPI
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dl_config_pdu;
/// Transport block size
uint32_t TBS;
/// The payload + CRC size in bits
......@@ -301,12 +299,20 @@ typedef struct {
int8_t delta_PUCCH;
/// Number of soft channel bits
uint32_t G;
/// Start PRB of BWP
uint16_t BWPStart;
/// Number of PRBs in BWP
uint16_t BWPSize;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// DMRS symbol positions
uint16_t dlDmrsSymbPos;
/// DMRS Configuration Type
uint8_t dmrsConfigType;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
......
......@@ -4836,22 +4836,22 @@ void idft4096(int16_t *x,int16_t *y,int scale)
if (scale>0) {
for (i=0; i<64; i++) {
y128[0] = shiftright_int16(y128[0],1);
y128[1] = shiftright_int16(y128[1],1);
y128[2] = shiftright_int16(y128[2],1);
y128[3] = shiftright_int16(y128[3],1);
y128[4] = shiftright_int16(y128[4],1);
y128[5] = shiftright_int16(y128[5],1);
y128[6] = shiftright_int16(y128[6],1);
y128[7] = shiftright_int16(y128[7],1);
y128[8] = shiftright_int16(y128[8],1);
y128[9] = shiftright_int16(y128[9],1);
y128[10] = shiftright_int16(y128[10],1);
y128[11] = shiftright_int16(y128[11],1);
y128[12] = shiftright_int16(y128[12],1);
y128[13] = shiftright_int16(y128[13],1);
y128[14] = shiftright_int16(y128[14],1);
y128[15] = shiftright_int16(y128[15],1);
y128[0] = shiftright_int16(y128[0],scale);
y128[1] = shiftright_int16(y128[1],scale);
y128[2] = shiftright_int16(y128[2],scale);
y128[3] = shiftright_int16(y128[3],scale);
y128[4] = shiftright_int16(y128[4],scale);
y128[5] = shiftright_int16(y128[5],scale);
y128[6] = shiftright_int16(y128[6],scale);
y128[7] = shiftright_int16(y128[7],scale);
y128[8] = shiftright_int16(y128[8],scale);
y128[9] = shiftright_int16(y128[9],scale);
y128[10] = shiftright_int16(y128[10],scale);
y128[11] = shiftright_int16(y128[11],scale);
y128[12] = shiftright_int16(y128[12],scale);
y128[13] = shiftright_int16(y128[13],scale);
y128[14] = shiftright_int16(y128[14],scale);
y128[15] = shiftright_int16(y128[15],scale);
y128+=16;
}
......@@ -8591,6 +8591,8 @@ void dft1200(int16_t *x,int16_t *y,unsigned char scale_flag)
}
//#define round trunc
void init_rad4(int N,int16_t *tw) {
int16_t *twa = tw;
......@@ -8760,6 +8762,8 @@ void init_dfts(void)
init_rad4_rep(1200,twa1200,twb1200,twc1200);
}
//#undef round
#ifdef MR_MAIN
#include <string.h>
#include <stdio.h>
......
......@@ -32,8 +32,6 @@
#include <stdint.h>
#include "PHY/sse_intrin.h"
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
struct complex {
double x;
......
......@@ -632,17 +632,12 @@ typedef struct PHY_VARS_gNB_s {
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
NR_gNB_COMMON common_vars;
NR_gNB_PRACH prach_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_NR_ULSCH_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX][2]; // [Nusers times][2 codewords]
NR_gNB_DLSCH_t *dlsch_SI,*dlsch_ra,*dlsch_p;
NR_gNB_DLSCH_t *dlsch_PCH;
/*
LTE_eNB_UE_stats UE_stats[NUMBER_OF_UE_MAX];
LTE_eNB_UE_stats *UE_stats_ptr[NUMBER_OF_UE_MAX];
*/
uint8_t pbch_configured;
// uint8_t pbch_pdu[4]; //PBCH_PDU_SIZE
char gNB_generate_rar;
/// NR synchronization sequences
......@@ -665,7 +660,7 @@ typedef struct PHY_VARS_gNB_s {
uint32_t nr_gold_pusch[2][20][2][NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD];
/// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_UE_MAX];
uint8_t first_sr[NUMBER_OF_NR_SR_MAX];
/// PRACH root sequence
uint32_t X_u[64][839];
......@@ -679,7 +674,6 @@ typedef struct PHY_VARS_gNB_s {
/// N0 (used for abstraction)
double N0;
unsigned char first_run_timing_advance[NUMBER_OF_UE_MAX];
unsigned char first_run_I0_measurements;
......@@ -697,89 +691,29 @@ typedef struct PHY_VARS_gNB_s {
/// counter to average prach energh over first 100 prach opportunities
int prach_energy_counter;
// PDSCH Variables
PDSCH_CONFIG_DEDICATED pdsch_config_dedicated[NUMBER_OF_UE_MAX];
// PUSCH Varaibles
PUSCH_CONFIG_DEDICATED pusch_config_dedicated[NUMBER_OF_UE_MAX];
// PUCCH variables
PUCCH_CONFIG_DEDICATED pucch_config_dedicated[NUMBER_OF_UE_MAX];
// UL-POWER-Control
UL_POWER_CONTROL_DEDICATED ul_power_control_dedicated[NUMBER_OF_UE_MAX];
// TPC
TPC_PDCCH_CONFIG tpc_pdcch_config_pucch[NUMBER_OF_UE_MAX];
TPC_PDCCH_CONFIG tpc_pdcch_config_pusch[NUMBER_OF_UE_MAX];
// CQI reporting
CQI_REPORT_CONFIG cqi_report_config[NUMBER_OF_UE_MAX];
// SRS Variables
SOUNDINGRS_UL_CONFIG_DEDICATED soundingrs_ul_config_dedicated[NUMBER_OF_UE_MAX];
uint8_t ncs_cell[20][7];
// Scheduling Request Config
SCHEDULING_REQUEST_CONFIG scheduling_request_config[NUMBER_OF_UE_MAX];
// Transmission mode per UE
uint8_t transmission_mode[NUMBER_OF_UE_MAX];
/// cba_last successful reception for each group, used for collision detection
uint8_t cba_last_reception[4];
// Pointers for active physicalConfigDedicated to be applied in current slot
struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX];
uint32_t rb_mask_ul[4];
/// Information regarding TM5
MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX];
/// target_ue_dl_mcs : only for debug purposes
uint32_t target_ue_dl_mcs;
/// target_ue_ul_mcs : only for debug purposes
uint32_t target_ue_ul_mcs;
/// target_ue_dl_rballoc : only for debug purposes
uint32_t ue_dl_rb_alloc;
/// target ul PRBs : only for debug
uint32_t ue_ul_nb_rb;
///check for Total Transmissions
uint32_t check_for_total_transmissions;
///check for MU-MIMO Transmissions
uint32_t check_for_MUMIMO_transmissions;
///check for SU-MIMO Transmissions
uint32_t check_for_SUMIMO_transmissions;
///check for FULL MU-MIMO Transmissions
uint32_t FULL_MUMIMO_transmissions;
/// Counter for total bitrate, bits and throughput in downlink
uint32_t total_dlsch_bitrate;
uint32_t total_transmitted_bits;
uint32_t total_system_throughput;
int hw_timing_advance;
/*
time_stats_t phy_proc;
*/
time_stats_t phy_proc_tx;
/*
time_stats_t phy_proc_rx;
*/
time_stats_t rx_prach;
/*
time_stats_t ofdm_mod_stats;
*/
time_stats_t dlsch_encoding_stats;
time_stats_t dlsch_modulation_stats;
time_stats_t dlsch_scrambling_stats;
time_stats_t tinput;
time_stats_t tprep;
time_stats_t tparity;
time_stats_t toutput;
time_stats_t dlsch_rate_matching_stats;
time_stats_t dlsch_turbo_encoding_stats;
time_stats_t dlsch_interleaving_stats;
time_stats_t dlsch_segmentation_stats;
/*
time_stats_t rx_dft_stats;
time_stats_t ulsch_channel_estimation_stats;
time_stats_t ulsch_freq_offset_estimation_stats;
......@@ -790,29 +724,7 @@ typedef struct PHY_VARS_gNB_s {
time_stats_t ulsch_deinterleaving_stats;
time_stats_t ulsch_demultiplexing_stats;
time_stats_t ulsch_llr_stats;
time_stats_t ulsch_tc_init_stats;
time_stats_t ulsch_tc_alpha_stats;
time_stats_t ulsch_tc_beta_stats;
time_stats_t ulsch_tc_gamma_stats;
time_stats_t ulsch_tc_ext_stats;
time_stats_t ulsch_tc_intl1_stats;
time_stats_t ulsch_tc_intl2_stats;
#ifdef LOCALIZATION
/// time state for localization
time_stats_t localization_stats;
#endif
int32_t pucch1_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1_stats[NUMBER_OF_UE_MAX][10*1024];
int32_t pucch1_stats_thres[NUMBER_OF_UE_MAX][10*1024];
int32_t pucch1ab_stats_cnt[NUMBER_OF_UE_MAX][10];
int32_t pucch1ab_stats[NUMBER_OF_UE_MAX][2*10*1024];
int32_t pusch_stats_rb[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_round[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_mcs[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_bsr[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_BO[NUMBER_OF_UE_MAX][10240];
*/
} PHY_VARS_gNB;
#endif
......@@ -45,6 +45,7 @@
#include <math.h>
#include "common_lib.h"
#include "msc.h"
#include "fapi_nr_ue_interface.h"
//#include <complex.h>
#include "assertions.h"
......@@ -470,65 +471,7 @@ typedef struct {
#ifdef NR_PDCCH_DEFS_NR_UE
#define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified
#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3)
#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define BLOCK_NUMBER 5
#define CLOSE_LOOP_IND 6
#define BANDWIDTH_PART_IND 7
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
typedef enum {
......@@ -759,12 +702,6 @@ typedef struct {
/// \brief PDCCH/DCI e-sequence (input to rate matching).
/// - first index: ? [0..96*N_RB_DL[
int16_t *e_rx;
/// number of PDCCH symbols in current subframe
uint8_t num_pdcch_symbols;
/// Allocated CRNTI for UE
uint16_t crnti;
/// 1: the allocated crnti is Temporary C-RNTI / 0: otherwise
uint8_t crnti_is_temporary;
/// Total number of PDU errors (diagnostic mode)
uint32_t dci_errors;
/// Total number of PDU received
......@@ -773,11 +710,14 @@ typedef struct {
uint32_t dci_false;
/// Total number of DCI missed (diagnostic mode)
uint32_t dci_missed;
/// nCCE for PUCCH per subframe
/// nCCE for PDCCH per subframe
uint8_t nCCE[10];
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
int nb_search_space;
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS_PER_CORESET];
/*
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
......@@ -788,7 +728,7 @@ typedef struct {
int n_RB_BWP[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
#endif*/
} NR_UE_PDCCH;
#define PBCH_A 24
......@@ -949,6 +889,7 @@ typedef struct {
// point to the current rxTx thread index
uint8_t current_thread_id[40];
t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PDSCH_FLP *pdsch_vars_flp[NUMBER_OF_CONNECTED_eNB_MAX+1];
NR_UE_PDSCH *pdsch_vars_SI[NUMBER_OF_CONNECTED_eNB_MAX+1];
......
......@@ -102,7 +102,7 @@
#define NR_MAX_PUSCH_ENCODED_LENGTH NR_MAX_PDSCH_ENCODED_LENGTH
#define NR_MAX_PDSCH_TBS 3824
#define MAX_NUM_NR_DLSCH_SEGMENTS 16
#define MAX_NUM_NR_DLSCH_SEGMENTS 24
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
......
......@@ -207,7 +207,14 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
AMP, frame, slot, fp, 0,
&gNB->dlsch_encoding_stats,
&gNB->dlsch_scrambling_stats,
&gNB->dlsch_modulation_stats);
&gNB->dlsch_modulation_stats,
&gNB->tinput,
&gNB->tprep,
&gNB->tparity,
&gNB->toutput,
&gNB->dlsch_rate_matching_stats,
&gNB->dlsch_interleaving_stats,
&gNB->dlsch_segmentation_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
}
......
......@@ -54,7 +54,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
// Note: we have to handle the thread IDs for this. To be revisited completely.
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
//NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
......@@ -66,40 +66,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
LOG_D(PHY,"Received %d DL pdus\n",dl_config->number_pdus);
pdcch_vars->nb_search_space = 0;
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
pdcch_vars2->n_RB_BWP[i] = dci_config->N_RB_BWP;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 6;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 1;
}
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
memcpy((void*)&pdcch_vars->pdcch_config[pdcch_vars->nb_search_space],(void*)pdcch_config,sizeof(*pdcch_config));
pdcch_vars->nb_search_space = pdcch_vars->nb_search_space + 1;
LOG_D(PHY,"Number of DCI SearchSpaces %d\n",pdcch_vars->nb_search_space);
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
......@@ -113,11 +87,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq->start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq->nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
......@@ -132,7 +109,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response)
}
}
}else{
pdcch_vars2->nb_search_space = 0;
pdcch_vars->nb_search_space = 0;
}
if(scheduled_response->ul_config != NULL){
......
This diff is collapsed.
......@@ -211,11 +211,11 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
sr_payload = nr_ue_get_SR(Mod_id,
CC_id,
frame_tx,
gNB_id,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
nr_tti_tx); // nr_tti_rx used for meas gap
CC_id,
frame_tx,
gNB_id,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
nr_tti_tx); // nr_tti_rx used for meas gap
}
else {
sr_payload = 1;
......@@ -590,7 +590,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format2_nr:
{
nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated[gNB_id],
......@@ -608,7 +608,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
0,//ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
......
This diff is collapsed.
......@@ -99,6 +99,7 @@
#define NUMBER_OF_NR_DLSCH_MAX 2//16
#define NUMBER_OF_NR_ULSCH_MAX 2//16
#define NUMBER_OF_NR_SR_MAX 16
#define MAX_MANAGED_ENB_PER_MOBILE 2
......
......@@ -135,8 +135,8 @@ int nr_rrc_mac_config_req_ue(
uint8_t gNB_index,
NR_MIB_t *mibP,
NR_ServingCellConfigCommon_t *sccP,
NR_MAC_CellGroupConfig_t *mac_cell_group_configP,
NR_PhysicalCellGroupConfig_t *phy_cell_group_configP,
// NR_MAC_CellGroupConfig_t *mac_cell_group_configP,
// NR_PhysicalCellGroupConfig_t *phy_cell_group_configP,
NR_SpCellConfig_t *spCell_ConfigP ){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
......@@ -147,123 +147,87 @@ int nr_rrc_mac_config_req_ue(
NR_ServingCellConfigCommon_t *scc;
if(mibP != NULL){
mac->mib = mibP; // update by every reception
mac->mib = mibP; // update by every reception
}
if(mac_cell_group_configP != NULL){
if(mac_cell_group_configP->drx_Config != NULL ){
switch(mac_cell_group_configP->drx_Config->present){
case NR_SetupRelease_DRX_Config_PR_NOTHING:
break;
case NR_SetupRelease_DRX_Config_PR_release:
mac->drx_Config = NULL;
break;
case NR_SetupRelease_DRX_Config_PR_setup:
mac->drx_Config = mac_cell_group_configP->drx_Config->choice.setup;
break;
default:
break;
}
}
if(mac_cell_group_configP->schedulingRequestConfig != NULL ){
mac->schedulingRequestConfig = mac_cell_group_configP->schedulingRequestConfig;
}
if(mac_cell_group_configP->bsr_Config != NULL ){
mac->bsr_Config = mac_cell_group_configP->bsr_Config;
}
if(mac_cell_group_configP->tag_Config != NULL ){
mac->tag_Config = mac_cell_group_configP->tag_Config;
}
if(mac_cell_group_configP->phr_Config != NULL ){
switch(mac_cell_group_configP->phr_Config->present){
case NR_SetupRelease_PHR_Config_PR_NOTHING:
break;
case NR_SetupRelease_PHR_Config_PR_release:
mac->phr_Config = NULL;
break;
case NR_SetupRelease_PHR_Config_PR_setup:
mac->phr_Config = mac_cell_group_configP->phr_Config->choice.setup;
break;
default:
break;
}
}
if(phy_cell_group_configP->cs_RNTI != NULL ){
switch(phy_cell_group_configP->cs_RNTI->present){
case NR_SetupRelease_RNTI_Value_PR_NOTHING:
break;
case NR_SetupRelease_RNTI_Value_PR_release:
mac->cs_RNTI = NULL;
break;
case NR_SetupRelease_RNTI_Value_PR_setup:
mac->cs_RNTI = &phy_cell_group_configP->cs_RNTI->choice.setup;
break;
default:
break;
}
}
}
if(phy_cell_group_configP != NULL ){
//config_phy(phy_cell_group_config, NULL);
}
// TODO check
if(spCell_ConfigP != NULL ){
mac->servCellIndex = spCell_ConfigP->servCellIndex;
if (spCell_ConfigP->reconfigurationWithSync) {
mac->scc = spCell_ConfigP->reconfigurationWithSync->spCellConfigCommon;
config_common_ue(mac);
mac->servCellIndex = spCell_ConfigP->servCellIndex;
if (spCell_ConfigP->reconfigurationWithSync) {
mac->scc = spCell_ConfigP->reconfigurationWithSync->spCellConfigCommon;
config_common_ue(mac);
mac->crnti = spCell_ConfigP->reconfigurationWithSync->newUE_Identity;
LOG_I(MAC,"Configuring CRNTI %x\n",mac->crnti);
}
mac->scd = spCell_ConfigP->spCellConfigDedicated;
/*
if(mac_cell_group_configP != NULL){
if(mac_cell_group_configP->drx_Config != NULL ){
switch(mac_cell_group_configP->drx_Config->present){
case NR_SetupRelease_DRX_Config_PR_NOTHING:
break;
case NR_SetupRelease_DRX_Config_PR_release:
mac->drx_Config = NULL;
break;
case NR_SetupRelease_DRX_Config_PR_setup:
mac->drx_Config = mac_cell_group_configP->drx_Config->choice.setup;
break;
default:
break;
}
}
mac->scd = spCell_ConfigP->spCellConfigDedicated;
}
#if 0
if(serving_cell_config != NULL ){
if(serving_cell_config->tdd_UL_DL_ConfigurationDedicated != NULL ){
mac->tdd_UL_DL_ConfigurationDedicated = serving_cell_config->tdd_UL_DL_ConfigurationDedicated;
}
if(spcell_config->initialDownlinkBWP != NULL ){
mac->init_DL_BWP = spcell_config->initialDownlinkBWP;
}
// storage list of DL BWP config. TODO should be modify to maintain(add/release) a list inside MAC instance, this implementation just use for one-shot RRC configuration setting.
if(spcell_config->downlinkBWP_ToAddModList != NULL ){
mac->BWP_Downlink_list = spcell_config->downlinkBWP_ToAddModList->list;
mac->BWP_Downlink_count = spcell_config->downlinkBWP_ToAddModList->count;
}
if(spcell_config->bwp_InactivityTimer != NULL ){
mac->bwp_InactivityTimer = spcell_config->bwp_InactivityTimer;
}
if(spcell_config->defaultDownlinkBWP_Id != NULL ){
mac->defaultDownlinkBWP_Id = spcell_config->defaultDownlinkBWP_Id;
}
if(spcell_config->pdsch_ServingCellConfig != NULL ){
mac->pdsch_ServingCellConfig = spcell_config->pdsch_ServingCellConfig;
}
if(spcell_config->csi_MeasConfig != NULL ){
mac->csi_MeasConfig = spcell_config->csi_MeasConfig;
}
spcell_config->tag_Id = spcell_config.tag_Id;
}
#endif
//scell config not yet
if(mac_cell_group_configP->schedulingRequestConfig != NULL ){
mac->schedulingRequestConfig = mac_cell_group_configP->schedulingRequestConfig;
}
if(mac_cell_group_configP->bsr_Config != NULL ){
mac->bsr_Config = mac_cell_group_configP->bsr_Config;
}
if(mac_cell_group_configP->tag_Config != NULL ){
mac->tag_Config = mac_cell_group_configP->tag_Config;
}
if(mac_cell_group_configP->phr_Config != NULL ){
switch(mac_cell_group_configP->phr_Config->present){
case NR_SetupRelease_PHR_Config_PR_NOTHING:
break;
case NR_SetupRelease_PHR_Config_PR_release:
mac->phr_Config = NULL;
break;
case NR_SetupRelease_PHR_Config_PR_setup:
mac->phr_Config = mac_cell_group_configP->phr_Config->choice.setup;
break;
default:
break;
}
}
}
if(phy_cell_group_configP != NULL ){
if(phy_cell_group_configP->cs_RNTI != NULL ){
switch(phy_cell_group_configP->cs_RNTI->present){
case NR_SetupRelease_RNTI_Value_PR_NOTHING:
break;
case NR_SetupRelease_RNTI_Value_PR_release:
mac->cs_RNTI = NULL;
break;
case NR_SetupRelease_RNTI_Value_PR_setup:
mac->cs_RNTI = &phy_cell_group_configP->cs_RNTI->choice.setup;
break;
default:
break;
}
}
}
*/
}
return 0;
}
This diff is collapsed.
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......@@ -328,7 +328,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Check if there are downlink symbols in the slot, if not return, no scheduling opportunities
if (is_nr_DL_slot(cc,slot_txP)==0) return;
if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_txP)==0) return;
RC.nrmac[module_idP]->frame = frame_rxP;
RC.nrmac[module_idP]->slot = slot_rxP;
......
This diff is collapsed.
......@@ -23,9 +23,10 @@
purpose: Compute NR TBS
author: Hongzhi WANG (TCL)
*/
#include "PHY/defs_nr_UE.h"
#define INDEX_MAX_TBS_TABLE (93)
#include "common/utils/nr/nr_common.h"
//Table 5.1.2.2-2
uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824};
......@@ -45,7 +46,7 @@ uint32_t nr_compute_tbs(uint16_t Qm,
uint32_t Ninfo, Np_info, C;
uint8_t n, scale;
nbp_re = NR_NB_SC_PER_RB * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
nbp_re = 12 * nb_symb_sch - nb_dmrs_prb - nb_rb_oh;
nb_re = min(156, nbp_re) * nb_rb;
......
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