Perform interleaving on the T2 card

- UE and gNB encoder modification
- update T2 related doc

doc/LDPC_T2_OFFLOAD_SETUP.md

@@ -62,7 +62,7 @@ sudo python3 ~/dpdk-stable/usertools/dpdk-devbind.py --bind=vfio-pci 41:00.0
 Replace PCI address of the card *41:00.0* by address detected by *lspci | grep "Xilinx"* command
  - hugepages setup (10 x 1GB hugepages)
 ```
-sudo python3 ~/dpdk-stable/usertools/dpdk-hugepages.py -p 1G --setup 10G`
+sudo python3 ~/dpdk-stable/usertools/dpdk-hugepages.py -p 1G --setup 10G
 ```
 
 *Note: device binding and hugepages setup has to be done after every reboot of
@@ -144,7 +144,6 @@ sudo ./nr-softmodem --sa -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa
 
 # Limitations
 ## AMD Xilinx T2 card
- - offload of the LDPC encoding implemented for MCS > 2, OAI CPU encoder is used for MCS =< 2
  - functionality of the LDPC encoding and decoding offload verified in OTA SISO setup with USRP N310 and Quectel RM500Q, blocking of the card reported for MIMO setup (2 layers)
 
 *Note: AMD Xilinx T1 Telco card is not supported anymore.*

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload.c

@@ -575,7 +575,7 @@ static void set_ldpc_enc_op(struct rte_bbdev_enc_op **ops,
     ops[i]->ldpc_enc.n_filler = p_offloadParams->F;
     ops[i]->ldpc_enc.n_cb = p_offloadParams->n_cb;
     ops[i]->ldpc_enc.rv_index = p_offloadParams->rv;
-    ops[i]->ldpc_enc.op_flags = RTE_BBDEV_LDPC_INTERLEAVER_BYPASS | RTE_BBDEV_LDPC_RATE_MATCH;
+    ops[i]->ldpc_enc.op_flags = RTE_BBDEV_LDPC_RATE_MATCH;
     ops[i]->ldpc_enc.code_block_mode = 1;
     ops[i]->ldpc_enc.output = outputs[start_idx + i];
     ops[i]->ldpc_enc.input = inputs[start_idx + i];

openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c

@@ -368,20 +368,13 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
     impp.rv = rel15->rvIndex[0];
     int nb_re_dmrs =
         (rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1) ? (6 * rel15->numDmrsCdmGrpsNoData) : (4 * rel15->numDmrsCdmGrpsNoData);
-    impp.G = nr_get_G(rel15->rbSize,
-                      rel15->NrOfSymbols,
-                      nb_re_dmrs,
-                      get_num_dmrs(rel15->dlDmrsSymbPos),
-                      harq->unav_res,
-                      rel15->qamModOrder[0],
-                      rel15->nrOfLayers);
-    uint8_t tmp[BBDEV_LDPC_MAX_E] __attribute__((aligned(32)));
-    uint8_t *e = tmp;
+    impp.G = nr_get_G(rel15->rbSize, rel15->NrOfSymbols, nb_re_dmrs, get_num_dmrs(rel15->dlDmrsSymbPos), harq->unav_res,
+                      rel15->qamModOrder[0], rel15->nrOfLayers);
     int r_offset = 0;
     for (int r = 0; r < impp.n_segments; r++) {
       impp.E = nr_get_E(impp.G, impp.n_segments, impp.Qm, rel15->nrOfLayers, r);
-      ldpc_interface_offload.LDPCencoder(&harq->c[r], &e, &impp);
-      nr_interleaving_ldpc(impp.E, impp.Qm, e, impp.output + r_offset);
+      uint8_t *f = impp.output + r_offset;
+      ldpc_interface_offload.LDPCencoder(&harq->c[r], &f, &impp);
       r_offset += impp.E;
     }
   } else {

openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c

@@ -152,12 +152,10 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
   }
   start_meas(&ue->ulsch_ldpc_encoding_stats);
   if (ldpc_interface_offload.LDPCencoder) {
-    uint8_t tmp[BBDEV_LDPC_MAX_E] __attribute__((aligned(32)));
-    uint8_t *e = tmp;
     for (int j = 0; j < impp.n_segments; j++) {
       impp.E = nr_get_E(G, impp.n_segments, impp.Qm, ulsch->pusch_pdu.nrOfLayers, j);
-      ldpc_interface_offload.LDPCencoder(&harq_process->c[j], &e, &impp);
-      nr_interleaving_ldpc(impp.E, impp.Qm, e, harq_process->f + r_offset);
+      uint8_t *f = harq_process->f + r_offset;
+      ldpc_interface_offload.LDPCencoder(&harq_process->c[j], &f, &impp);
       r_offset += impp.E;
     }
   } else {