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Commit c00b4402 authored by hardy's avatar hardy
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Merge remote-tracking branch 'origin/develop-sib1-update' into integration_2021_wk05

parents 1d6eea64 62bc47c8
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Showing with 643 additions and 109 deletions
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @ c00b4402
...@@ -102,8 +102,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, ...@@ -102,8 +102,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb); LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb); LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol // DMRS length is per OFDM symbol
uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)? uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
(n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE) uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType); LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
...@@ -164,62 +163,81 @@ void nr_generate_dci(PHY_VARS_gNB *gNB, ...@@ -164,62 +163,81 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] ); printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
#endif #endif
/// Resource mapping /// Resource mapping
if (cset_start_sc >= frame_parms.ofdm_symbol_size) if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size; cset_start_sc -= frame_parms.ofdm_symbol_size;
/*Reorder REG list for a freq first mapping*/ // Get cce_list indices by reg_idx in ascending order
uint8_t reg_idx0 = pdcch_pdu_rel15->dci_pdu.CceIndex[d]*NR_NB_REG_PER_CCE; int reg_list_index = 0;
uint8_t nb_regs = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*NR_NB_REG_PER_CCE; int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for(int p2 = 0; p2 < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; p2++) {
if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
reg_list_order[reg_list_index] = p2;
reg_list_index++;
break;
}
}
}
/*Mapping the encoded DCI along with the DMRS */ /*Mapping the encoded DCI along with the DMRS */
for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) { for (int cce_count = 0; cce_count < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; cce_count ++) {
k = cset_start_sc + (12*reg_idx/cset_nsymb);
int8_t cce_idx = reg_list_order[cce_count];
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size; for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb); k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2 if (k >= frame_parms.ofdm_symbol_size)
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG) k -= frame_parms.ofdm_symbol_size;
dmrs_idx = (reg_idx/cset_nsymb)*3;
else l = cset_start_symb + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].symb_idx;
dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
k_prime = 0; if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
dmrs_idx =gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx * 3;
for (int m=0; m<NR_NB_SC_PER_RB; m++) { else
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
//if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15; k_prime = 0;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] =
(amp * mod_dmrs[l][dmrs_idx << 1]) >> 15;
((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS #ifdef DEBUG_PDCCH_DMRS
printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1], printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif #endif
dmrs_idx++;
//} dmrs_idx++;
k_prime++;
k_prime++;
} else { // DCI payload } else { // DCI payload
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15; ((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15; ((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
#ifdef DEBUG_DCI #ifdef DEBUG_DCI
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1], printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]); ((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif #endif
dci_idx++; dci_idx++;
} }
k++; k++;
if (k >= frame_parms.ofdm_symbol_size) if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size; k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_idx } // m
} // reg_in_cce_idx
} // cce_count
LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n", LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n",
*pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload); *pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload);
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ c00b4402
...@@ -81,12 +81,14 @@ ...@@ -81,12 +81,14 @@
void nr_pdcch_demapping_deinterleaving(uint32_t *llr, void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
uint32_t *z, uint32_t *z,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t coreset_time_dur, uint8_t coreset_time_dur,
uint32_t coreset_nbr_rb, uint32_t coreset_nbr_rb,
uint8_t reg_bundle_size_L, uint8_t reg_bundle_size_L,
uint8_t coreset_interleaver_size_R, uint8_t coreset_interleaver_size_R,
uint8_t n_shift) { uint8_t n_shift,
uint8_t number_of_candidates,
uint16_t *CCE,
uint8_t *L) {
/* /*
* This function will do demapping and deinterleaving from llr containing demodulated symbols * This function will do demapping and deinterleaving from llr containing demodulated symbols
* Demapping will regroup in REG and bundles * Demapping will regroup in REG and bundles
...@@ -122,35 +124,61 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr, ...@@ -122,35 +124,61 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
| REG 0 (bundle 0) bundle 0 bundle 0 | REG 0 (bundle 0) bundle 0 bundle 0
*/ */
int c=0,r=0; int c = 0, r = 0;
uint16_t bundle_j=0, f_bundle_j=0,f_reg=0; uint16_t bundle_j = 0, f_bundle_j = 0, f_reg = 0;
uint32_t coreset_C=0; uint32_t coreset_C = 0;
uint16_t index_z, index_llr; uint16_t index_z, index_llr;
int coreset_interleaved = 0; int coreset_interleaved = 0;
if (reg_bundle_size_L!=0) { // interleaving will be done only if reg_bundle_size_L != 0 if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved=1; coreset_interleaved = 1;
coreset_C = (uint32_t)((coreset_nbr_rb * coreset_time_dur)/ (coreset_interleaver_size_R*reg_bundle_size_L)); coreset_C = (uint32_t) ((coreset_nbr_rb * coreset_time_dur) / (coreset_interleaver_size_R * reg_bundle_size_L));
} else { } else {
reg_bundle_size_L=6; reg_bundle_size_L = 6;
} }
for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
if ((reg%reg_bundle_size_L) == 0) { int f_bundle_j_list[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int reg = 0; reg < ((coreset_nbr_rb * coreset_time_dur)); reg++) {
if ((reg % reg_bundle_size_L) == 0) {
if (r == coreset_interleaver_size_R) { if (r == coreset_interleaver_size_R) {
r=0; r = 0;
c++; c++;
} }
bundle_j = (c*coreset_interleaver_size_R)+r; bundle_j = (c * coreset_interleaver_size_R) + r;
f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L); f_bundle_j = ((r * coreset_C) + c + n_shift) % ((coreset_nbr_rb * coreset_time_dur) / reg_bundle_size_L);
if (coreset_interleaved == 0) f_bundle_j = bundle_j;
if (coreset_interleaved==0) f_bundle_j=bundle_j; f_bundle_j_list[reg / 6] = f_bundle_j;
LOG_DNL("[r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
} }
if ((reg % reg_bundle_size_L) == 0) r++;
}
// Get cce_list indices by reg_idx in ascending order
int f_bundle_j_list_id = 0;
int f_bundle_j_list_ord[NR_MAX_PDCCH_AGG_LEVEL] = {};
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
f_bundle_j_list_id = CCE[c_id];
for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) {
if (f_bundle_j_list[p2] == p) {
f_bundle_j_list_ord[f_bundle_j_list_id] = p;
f_bundle_j_list_id++;
break;
}
}
}
}
for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
f_reg = (f_bundle_j*reg_bundle_size_L)+(reg%reg_bundle_size_L); f_reg = (f_bundle_j_list_ord[reg/6]*reg_bundle_size_L)+(reg%reg_bundle_size_L);
index_z = 9*reg; index_z = 9*reg;
index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb))); index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb)));
...@@ -386,14 +414,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -386,14 +414,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
rxF=NULL; rxF=NULL;
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start) // first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n", LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))); c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
} }
if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) { if (((c_rb + n_BWP_start) >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC) // number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
...@@ -406,7 +434,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -406,7 +434,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
//#endif //#endif
} }
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case //if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
#ifdef NR_PDCCH_DCI_DEBUG #ifdef NR_PDCCH_DCI_DEBUG
...@@ -415,7 +443,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -415,7 +443,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif #endif
} }
if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { if (((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
// number of RBs is odd and c_rb is higher than half system bandwidth + 1 // number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC // if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
...@@ -425,7 +453,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF, ...@@ -425,7 +453,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif #endif
} }
if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC if (((c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC) // if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table) // we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
...@@ -760,12 +788,14 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -760,12 +788,14 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n"); LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr, nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx, (uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration, rel15->coreset.duration,
n_rb, n_rb,
rel15->coreset.RegBundleSize, rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize, rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex); rel15->coreset.ShiftIndex,
rel15->number_of_candidates,
rel15->CCE,
rel15->L);
/* /*
nr_pdcch_unscrambling(rel15->rnti, nr_pdcch_unscrambling(rel15->rnti,
frame_parms, frame_parms,
......
openair1/PHY/defs_nr_common.h
View file @ c00b4402
...@@ -89,7 +89,7 @@ ...@@ -89,7 +89,7 @@
#define NR_MAX_NUM_BWP 4 #define NR_MAX_NUM_BWP 4
#define NR_MAX_PDCCH_AGG_LEVEL 16 #define NR_MAX_PDCCH_AGG_LEVEL 16 // 3GPP TS 38.211 V15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels
#define NR_MAX_CSET_DURATION 3 #define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18 #define NR_MAX_NB_RBG 18
......
openair2/LAYER2/NR_MAC_UE/config_ue.c
View file @ c00b4402
...@@ -414,15 +414,15 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ ...@@ -414,15 +414,15 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
mac->search_space_zero->duration=NULL; mac->search_space_zero->duration=NULL;
// should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed // should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0; mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0;
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6); mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7);
mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2; mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2;
mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2; mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2;
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1 // FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0; mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n2;
mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1; mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
...@@ -440,7 +440,9 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){ ...@@ -440,7 +440,9 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
mac->coreset0->frequencyDomainResources.size = 6; mac->coreset0->frequencyDomainResources.size = 6;
mac->coreset0->frequencyDomainResources.bits_unused = 3; mac->coreset0->frequencyDomainResources.bits_unused = 3;
mac->coreset0->duration = 1; mac->coreset0->duration = 1;
mac->coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved;
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved)); mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
mac->coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6;
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2; mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL; mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL;
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle; mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @ c00b4402
...@@ -55,23 +55,6 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd ...@@ -55,23 +55,6 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
LOG_D(MAC,"Filling search candidates for DCI\n"); LOG_D(MAC,"Filling search candidates for DCI\n");
if(ss->searchSpaceId == 0) {
// TODO: Update the maximum number of PDCCH candidates accordingly with Aggregation Level
rel15->number_of_candidates=1;
rel15->CCE[0]=0;
rel15->L[0]=6;
} else {
rel15->number_of_candidates=4;
rel15->CCE[0]=0;
rel15->L[0]=4;
rel15->CCE[1]=4;
rel15->L[1]=4;
rel15->CCE[2]=8;
rel15->L[2]=4;
rel15->CCE[3]=12;
rel15->L[3]=4;
}
uint8_t aggregation; uint8_t aggregation;
find_aggregation_candidates(&aggregation, find_aggregation_candidates(&aggregation,
&rel15->number_of_candidates, &rel15->number_of_candidates,
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ c00b4402
...@@ -987,7 +987,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -987,7 +987,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
LOG_D(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); LOG_D(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
LOG_D(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); LOG_D(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
LOG_D(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); LOG_D(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); LOG_D(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
//storing ssb index in the mac structure //storing ssb index in the mac structure
mac->mib_ssb = ssb_index; mac->mib_ssb = ssb_index;
......
openair2/RRC/NR/MESSAGES/asn1_msg.c
View file @ c00b4402
This diff is collapsed.
openair2/RRC/NR/rrc_gNB.c
View file @ c00b4402
...@@ -212,7 +212,11 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration ...@@ -212,7 +212,11 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__); LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__);
rrc->carrier.MIB = (uint8_t *) malloc16(4); rrc->carrier.MIB = (uint8_t *) malloc16(4);
rrc->carrier.sizeof_MIB = do_MIB_NR(rrc,0); rrc->carrier.sizeof_MIB = do_MIB_NR(rrc,0);
rrc->carrier.sizeof_SIB1 = do_SIB1_NR(&rrc->carrier,configuration);
if(get_softmodem_params()->sa) {
rrc->carrier.sizeof_SIB1 = do_SIB1_NR(&rrc->carrier,configuration);
}
LOG_I(NR_RRC,"Done init_NR_SI\n"); LOG_I(NR_RRC,"Done init_NR_SI\n");
rrc_mac_config_req_gNB(rrc->module_id, rrc_mac_config_req_gNB(rrc->module_id,
rrc->carrier.ssb_SubcarrierOffset, rrc->carrier.ssb_SubcarrierOffset,
......
openair2/RRC/NR/rrc_gNB_reconfig.c
View file @ c00b4402
...@@ -128,15 +128,15 @@ void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) { ...@@ -128,15 +128,15 @@ void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) {
// should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed // should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed
ss0->monitoringSymbolsWithinSlot->buf[1] = 0; ss0->monitoringSymbolsWithinSlot->buf[1] = 0;
ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6); ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7);
ss0->monitoringSymbolsWithinSlot->size = 2; ss0->monitoringSymbolsWithinSlot->size = 2;
ss0->monitoringSymbolsWithinSlot->bits_unused = 2; ss0->monitoringSymbolsWithinSlot->bits_unused = 2;
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1 // FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0; ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0; ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0; ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1; ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0; ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common; ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
......
openair2/RRC/NR_UE/rrc_UE.c
View file @ c00b4402
...@@ -1500,8 +1500,9 @@ int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index ...@@ -1500,8 +1500,9 @@ int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index
} }
sib1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1; sib1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1;
if (*(int64_t*)sib1 != 1) { if (*(int64_t*)sib1 != 1) {
LOG_D(RRC, "SIB1 address: %lx\n", *(int64_t*)sib1); LOG_I(RRC, "SIB1 decoded\n");
xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1); if( g_log->log_component[RRC].level >= OAILOG_DEBUG )
xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1);
} }
else else
LOG_E(PHY, "sib1 is starting by 8 times 0\n"); LOG_E(PHY, "sib1 is starting by 8 times 0\n");
......
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
View file @ c00b4402
...@@ -38,10 +38,10 @@ gNBs = ...@@ -38,10 +38,10 @@ gNBs =
# downlinkConfigCommon # downlinkConfigCommon
#frequencyInfoDL #frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 641272; absoluteFrequencySSB = 641280;
dl_frequencyBand = 78; dl_frequencyBand = 78;
# this is 3600 MHz # this is 3600 MHz
dl_absoluteFrequencyPointA = 640000; dl_absoluteFrequencyPointA = 640008;
#scs-SpecificCarrierList #scs-SpecificCarrierList
dl_offstToCarrier = 0; dl_offstToCarrier = 0;
# subcarrierSpacing # subcarrierSpacing
......
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