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Commit c0f18e0e authored by winckel's avatar winckel
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Fixed an include path issue. 

Added asserts in default section of some switch.
Fixed some warning due to uninitialized variables.

pre-ci OK.

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@4540 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 0e5ac31c
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Inline Side-by-side
Showing with 47 additions and 11 deletions
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ c0f18e0e
......@@ -46,6 +46,7 @@
#ifdef DEBUG_DCI_TOOLS
#include "PHY/vars.h"
#endif
#include "assertions.h"
//#define DEBUG_DCI
......@@ -268,6 +269,8 @@ void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", N_RB_DL);
DevParam (N_RB_DL, 0, 0);
break;
}
......@@ -336,6 +339,11 @@ uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL) {
}
}
break;
default:
LOG_E(PHY,"Invalide N_RB_DL %d\n", N_RB_DL);
DevParam (N_RB_DL, 0, 0);
break;
}
return(nprb);
......@@ -538,8 +546,9 @@ int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
uint16_t p_rnti,
uint16_t DL_pmi_single) {
uint8_t harq_pid;
uint32_t rballoc,RIV_max;
uint8_t harq_pid = UINT8_MAX;
uint32_t rballoc = UINT32_MAX;
uint32_t RIV_max = 0;
uint8_t NPRB,tbswap,tpmi=0;
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1;
uint8_t frame_type=frame_parms->frame_type;
......@@ -701,6 +710,11 @@ int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
dlsch[0]->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
RIV_max = RIV_max100;
break;
default:
LOG_E(PHY,"Invalid N_RB_D %dL\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
// harq_pid field is reserved
......@@ -1239,6 +1253,8 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) {
((DCI0_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->cqi_req);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
else if (frame_parms->frame_type == FDD)
......@@ -1292,6 +1308,8 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) {
((DCI0_20MHz_FDD_t *)&dci->dci_pdu[0])->cqi_req);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
else
......@@ -1356,6 +1374,8 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) {
((DCI1_20MHz_TDD_t *)&dci->dci_pdu[0])->dai);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
else if (frame_parms->frame_type == FDD) {
......@@ -1409,6 +1429,8 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) {
((DCI1_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
}
......@@ -1465,6 +1487,8 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) {
msg("DAI %d\n",((DCI1A_20MHz_TDD_1_6_t *)&dci->dci_pdu[0])->dai);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
......@@ -1512,6 +1536,8 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci) {
msg("TPC %d\n",((DCI1A_20MHz_FDD_t *)&dci->dci_pdu[0])->TPC);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
}
......@@ -2912,6 +2938,8 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
......@@ -3240,13 +3268,14 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
LTE_eNB_ULSCH_t *ulsch=phy_vars_eNB->ulsch_eNB[UE_id];
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms;
uint32_t cqi_req;
uint32_t dai=0;
uint32_t cshift;
uint32_t TPC;
uint32_t ndi;
uint32_t mcs;
uint32_t rballoc,RIV_max;
uint32_t cqi_req = 0;
uint32_t dai = 0;
uint32_t cshift = 0;
uint32_t TPC = 0;
uint32_t ndi = 0;
uint32_t mcs = 0;
uint32_t rballoc = UINT32_MAX;
uint32_t RIV_max = 0;
// uint32_t hopping;
// uint32_t type;
......@@ -3373,7 +3402,12 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT100[rballoc];
ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT100[rballoc];
printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
break;
default:
LOG_E(PHY,"Invalid N_RB_DL %d\n", frame_parms->N_RB_DL);
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
......
openair1/SIMULATION/LTE_PHY/Makefile
View file @ c0f18e0e
......@@ -4,6 +4,7 @@ CPUFLAGS = -mmmx -msse -msse2 -mssse3 -msse4.1
#CPUFLAGS += $(shell if [ -z $(SSE3PROC) ]; then echo "" ; else echo "-mssse3"; fi)
#CPUFLAGS += $(shell if [ -z $(SSE4PROC) ]; then echo "" ; else echo "-msse4"; fi)
COMMON_UTILS_DIR = $(OPENAIR_HOME)/common/utils
TOP_DIR = $(OPENAIR1_DIR)
OPENAIR1_TOP = $(OPENAIR1_DIR)
OPENAIR2_TOP = $(OPENAIR2_DIR)
......@@ -99,6 +100,7 @@ CFLAGS += -DRTAI_ENABLED -D__IN_RTAI__ $(shell rtai-config --lxrt-cflags)
LFLAGS += $(shell rtai-config --lxrt-ldflags) -llxrt
endif
include $(COMMON_UTILS_DIR)/Makefile.inc
include $(TOP_DIR)/PHY/Makefile.inc
SCHED_OBJS = $(TOP_DIR)/SCHED/phy_procedures_lte_common.o #$(TOP_DIR)/SCHED/phy_procedures_lte_eNb.o $(TOP_DIR)/SCHED/phy_procedures_lte_ue.o
include $(TOP_DIR)/SCHED/Makefile.inc
......@@ -109,7 +111,7 @@ include $(OPENAIR2_DIR)/RRC/LITE/MESSAGES/Makefile.inc
#LOG_OBJS += $(LOG_DIR)/vcd_signal_dumper.o
CFLAGS += $(L2_incl) -I$(ASN1_MSG_INC) -I$(TOP_DIR) -I$(OPENAIR2_DIR) -I$(OPENAIR3) $(UTIL_incl)
CFLAGS += $(L2_incl) -I$(ASN1_MSG_INC) -I$(TOP_DIR) -I$(OPENAIR2_DIR) -I$(OPENAIR3) $(UTIL_incl) $(UTILS_incl)
# EXTRA_CFLAGS =
#STATS_OBJS += $(TOP_DIR)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_proc.o
......
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