Skip to content

O
OpenXG-RAN
Commit d60809b2 authored by Robert Schmidt's avatar Robert Schmidt
Browse files
Options

Add O-RAN lib

parent 102ada7d
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 28011 additions and 3 deletions
CMakeLists.txt
View file @ d60809b2
...@@ -85,7 +85,20 @@ set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3) ...@@ -85,7 +85,20 @@ set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3)
set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3) set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3)
set (OPENAIR_CMAKE ${OPENAIR_DIR}/cmake_targets) set (OPENAIR_CMAKE ${OPENAIR_DIR}/cmake_targets)
set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY}) set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY})
set (INTEL_LIB /usr/local/intel64)
set (DPDK_DIR $ENV{RTE_SDK}/$ENV{RTE_TARGET}/include)
if(DEFINED ENV{XRAN_LIB_DIR})
set (XRAN_LIB_DIR $ENV{XRAN_LIB_DIR})
else()
set (XRAN_LIB_DIR /usr/local/xran)
endif()
set (XRAN_DIR $ENV{XRAN_LIB_DIR}/../src)
set (XRAN_COMMON_DIR $ENV{XRAN_LIB_DIR}/../../test/common)
set (XRAN_LIB_API_DIR $ENV{XRAN_LIB_DIR}/../api)
Message("XRAN_LIB_DIR: ${XRAN_LIB_DIR}, DPDK_DIR: ${DPDK_DIR}")
project (OpenAirInterface) project (OpenAirInterface)
#################################################### ####################################################
...@@ -472,6 +485,52 @@ target_link_libraries(params_libconfig PRIVATE ${libconfig_LIBRARIES}) ...@@ -472,6 +485,52 @@ target_link_libraries(params_libconfig PRIVATE ${libconfig_LIBRARIES})
add_library(shlib_loader OBJECT common/utils/load_module_shlib.c) add_library(shlib_loader OBJECT common/utils/load_module_shlib.c)
target_link_libraries(shlib_loader PRIVATE CONFIG_LIB) target_link_libraries(shlib_loader PRIVATE CONFIG_LIB)
# ORAN 5G library
######################################################################
add_boolean_option(ORAN_BRONZE OFF "Build support for Bronze version of ORAN FHI" OFF)
if (ORAN_BRONZE)
set(ORAN_FHLIB_5G_SOURCE
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/sample-app-bronze.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/common_bronze.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/config_bronze.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/oran_isolate.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/oaioran.c
)
else()
set(ORAN_FHLIB_5G_SOURCE
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/sample-app-E.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/app_io_fh_xran-E.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/common-E.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/config-E.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/oran_isolate.c
${OPENAIR_DIR}/radio/ETHERNET/oran/5g/oaioran.c
)
endif()
add_library(oran_fhlib_5g MODULE ${ORAN_FHLIB_5G_SOURCE})
target_include_directories(oran_fhlib_5g PRIVATE ${XRAN_DIR})
target_include_directories(oran_fhlib_5g PRIVATE ${DPDK_DIR})
target_include_directories(oran_fhlib_5g PRIVATE ${INTEL_LIB})
target_include_directories(oran_fhlib_5g PRIVATE ${XRAN_COMMON_DIR})
target_include_directories(oran_fhlib_5g PRIVATE ${XRAN_LIB_API_DIR})
if (ORAN_BRONZE)
set_target_properties(oran_fhlib_5g PROPERTIES COMPILE_FLAGS "-DORAN_BRONZE -fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
else()
set_target_properties(oran_fhlib_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
endif()
#SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive")
execute_process(
COMMAND bash -c "pkg-config --libs libdpdk --static | tr -d '\n'| sed 's/[[:space:]]*$//'"
OUTPUT_VARIABLE DPDK_LIBS
)
TARGET_LINK_LIBRARIES(oran_fhlib_5g PRIVATE ${DPDK_LIBS})
TARGET_LINK_LIBRARIES(oran_fhlib_5g PRIVATE -L${XRAN_LIB_DIR} -lxran)
TARGET_LINK_LIBRARIES(oran_fhlib_5g PRIVATE pthread dl rt m numa)
target_link_libraries(oran_fhlib_5g PRIVATE asn1_nr_rrc asn1_lte_rrc)
########################################################## ##########################################################
# LDPC offload library # LDPC offload library
......
cmake_targets/build_oai
View file @ d60809b2
...@@ -96,7 +96,7 @@ Options: ...@@ -96,7 +96,7 @@ Options:
USRP, BLADERF, LMSSDR, IRIS, SIMU, AW2SORI, None (Default) USRP, BLADERF, LMSSDR, IRIS, SIMU, AW2SORI, None (Default)
Adds this RF board support (in external packages installation and in compilation) Adds this RF board support (in external packages installation and in compilation)
-t | --transport -t | --transport
Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g, oran_fhlib_5g
-P | --phy_simulators -P | --phy_simulators
Makes the unitary tests Layer 1 simulators Makes the unitary tests Layer 1 simulators
-S | --core_simulators -S | --core_simulators
...@@ -300,7 +300,7 @@ function main() { ...@@ -300,7 +300,7 @@ function main() {
TARGET_LIST="$TARGET_LIST oai_eth_transpro" TARGET_LIST="$TARGET_LIST oai_eth_transpro"
CMAKE_CMD="$CMAKE_CMD -DOAI_${2^^}=ON" # ^^ makes uppercase CMAKE_CMD="$CMAKE_CMD -DOAI_${2^^}=ON" # ^^ makes uppercase
;; ;;
"benetel4g" | "benetel5g") "benetel4g" | "benetel5g" | "oran_fhlib_5g" | "oran_fhlib_4g")
TARGET_LIST="$TARGET_LIST $2" TARGET_LIST="$TARGET_LIST $2"
CMAKE_CMD="$CMAKE_CMD -DOAI_${2^^}=ON" # ^^ makes uppercase CMAKE_CMD="$CMAKE_CMD -DOAI_${2^^}=ON" # ^^ makes uppercase
;; ;;
...@@ -448,7 +448,7 @@ function main() { ...@@ -448,7 +448,7 @@ function main() {
if [ ! -v BUILD_UHD_FROM_SOURCE ] && [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then if [ ! -v BUILD_UHD_FROM_SOURCE ] && [ ! "$DISABLE_HARDWARE_DEPENDENCY" == "True" ]; then
install_usrp_uhd_driver $UHD_IMAGES_DIR install_usrp_uhd_driver $UHD_IMAGES_DIR
fi fi
fi fi
if [ "$HW" == "OAI_BLADERF" ] ; then if [ "$HW" == "OAI_BLADERF" ] ; then
echo_info "installing packages for BLADERF support" echo_info "installing packages for BLADERF support"
check_install_bladerf_driver check_install_bladerf_driver
......
cmake_targets/tools/oran_fhi_integration_patches/bronze/oai-2-disable-dedicated-bandwidth-config-for-Amarisoft-UE-simbox.patch 0 → 100644
View file @ d60809b2
From d1ad2907b3c3572de193ae770912436fb0a96443 Mon Sep 17 00:00:00 2001
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
Date: Fri, 27 Jan 2023 16:18:08 +0530
Subject: [PATCH 2/2] disable dedicated bandwidth config for Amarisoft UE
simbox
---
openair2/RRC/NR/MESSAGES/asn1_msg.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c
index e52e637dd8..f15735b36f 100644
--- a/openair2/RRC/NR/MESSAGES/asn1_msg.c
+++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c
@@ -1213,10 +1213,8 @@ void fill_initial_cellGroupConfig(int uid,
physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook = NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic;
cellGroupConfig->physicalCellGroupConfig = physicalCellGroupConfig;
- cellGroupConfig->spCellConfig = calloc(1,sizeof(*cellGroupConfig->spCellConfig));
+ cellGroupConfig->spCellConfig = NULL;
- fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,servingcellconfigdedicated,configuration);
-
cellGroupConfig->sCellToAddModList = NULL;
cellGroupConfig->sCellToReleaseList = NULL;
}
--
2.25.1
cmake_targets/tools/oran_fhi_integration_patches/bronze/oran-fhi-1-compile-libxran-using-gcc-and-disable-avx512.patch 0 → 100644
View file @ d60809b2
From a7f20ad7c4ada7d50f21c5a8f15b1baab37481fa Mon Sep 17 00:00:00 2001
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
Date: Fri, 27 Jan 2023 15:42:36 +0530
Subject: [PATCH 1/4] compile libxran using-gcc and disable avx512
---
fhi_lib/build.sh | 7 ++++---
fhi_lib/lib/Makefile | 23 ++++++++++++-----------
2 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/fhi_lib/build.sh b/fhi_lib/build.sh
index 22859b5..575bcc5 100755
--- a/fhi_lib/build.sh
+++ b/fhi_lib/build.sh
@@ -70,11 +70,12 @@ echo "LIBXRANSO = ${LIBXRANSO}"
echo "MLOG = ${MLOG}"
cd $XRAN_FH_LIB_DIR
+make clean
make $COMMAND_LINE MLOG=${MLOG} LIBXRANSO=${LIBXRANSO} #DEBUG=1 VERBOSE=1
-echo 'Building xRAN Test Application'
-cd $XRAN_FH_APP_DIR
-make $COMMAND_LINE MLOG=${MLOG} #DEBUG=1 VERBOSE=1
+#echo 'Building xRAN Test Application'
+#cd $XRAN_FH_APP_DIR
+#make $COMMAND_LINE MLOG=${MLOG} #DEBUG=1 VERBOSE=1
if [ -z ${GTEST_ROOT+x} ];
then
diff --git a/fhi_lib/lib/Makefile b/fhi_lib/lib/Makefile
index 579a0c6..de5309d 100644
--- a/fhi_lib/lib/Makefile
+++ b/fhi_lib/lib/Makefile
@@ -23,11 +23,11 @@ MYCUSTOMSPACE1='------------------------------------------------------------'
##############################################################
# Tools configuration
##############################################################
-CC := icc
-CPP := icpc
+CC := gcc
+#CPP := icpc
AS := as
AR := ar
-LD := icc
+LD := gcc
OBJDUMP := objdump
ifeq ($(SHELL),cmd.exe)
@@ -95,9 +95,10 @@ CC_FLAGS += -std=gnu11 -Wall -Wno-deprecated-declarations \
-fPIC \
-Wall \
-Wimplicit-function-declaration \
- -g -O3 -wd1786
+ -g -O0 -mssse3 \
+ -march=native
-CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \
+#CPP_FLAGS := -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -D_REENTRANT -pipe -no-prec-div \
-no-prec-div -fp-model fast=2 -fPIC \
-no-prec-sqrt -falign-functions=16 -fast-transcendentals \
-Werror -Wno-unused-variable -std=c++11 -mcmodel=large
@@ -121,14 +122,14 @@ PROJECT_OBJ_DIR := build/obj
CC_OBJS := $(patsubst %.c,%.o,$(CC_SRC))
CPP_OBJS := $(patsubst %.cpp,%.o,$(CPP_SRC))
AS_OBJS := $(patsubst %.s,%.o,$(AS_SRC))
-OBJS := $(CC_OBJS) $(CPP_OBJS) $(AS_OBJS) $(LIBS)
+OBJS := $(CC_OBJS) $(AS_OBJS) $(LIBS)
DIRLIST := $(addprefix $(PROJECT_OBJ_DIR)/,$(sort $(dir $(OBJS))))
CC_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CC_OBJS))
CPP_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(CPP_OBJS))
AS_OBJTARGETS := $(addprefix $(PROJECT_OBJ_DIR)/,$(AS_OBJS))
-CPP_COMP := -O3 -xcore-avx512 -restrict -g -fasm-blocks
+CPP_COMP := -O3 -xcore-avx512 -restrict -g
CC_FLAGS_FULL := $(CC_FLAGS) $(INC) $(DEF)
CPP_FLAGS_FULL := $(CPP_FLAGS) $(CPP_COMP) $(INC) $(DEF)
@@ -160,7 +161,7 @@ $(CPP_DEPS) :
@$(CPP) -MM $(subst __up__,../,$(subst __dep__,,$@)) -MT $(PROJECT_OBJ_DIR)/$(patsubst %.cpp,%.o,$(subst __up__,../,$(subst __dep__,,$@))) $(CPP_FLAGS_FULL) >> $(PROJECT_DEP_FILE)
.PHONY : generate_deps
-generate_deps : clear_dep $(CC_DEPS) $(CPP_DEPS)
+generate_deps : clear_dep $(CC_DEPS)
.PHONY : echo_start_build
@@ -211,10 +212,10 @@ welcome_line :
debug : all
release : all
-$(PROJECT_BINARY) : $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
+$(PROJECT_BINARY) : $(DIRLIST) echo_start_build $(GENERATE_DEPS) $(PRE_BUILD) $(CC_OBJTARGETS) $(AS_OBJTARGETS)
@echo [AR] $(subst $(BUILDDIR)/,,$@)
ifeq ($(XRAN_LIB_SO),)
- @$(AR) $(AR_FLAGS) $@ $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS)
+ @$(AR) $(AR_FLAGS) $@ $(CC_OBJTARGETS) $(AS_OBJTARGETS)
else
- @$(CC) $(CC_OBJTARGETS) $(CPP_OBJTARGETS) $(AS_OBJTARGETS) -shared -fPIC -o $@
+ @$(CC) $(CC_OBJTARGETS) $(AS_OBJTARGETS) -shared -fPIC -o $@
endif
--
2.25.1
cmake_targets/tools/oran_fhi_integration_patches/bronze/oran-fhi-2-return-correct-slot_id.patch 0 → 100644
View file @ d60809b2
From f26a9e9a3b902d56fffcb40644fa7d3e17d793f9 Mon Sep 17 00:00:00 2001
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
Date: Fri, 27 Jan 2023 15:43:50 +0530
Subject: [PATCH 2/4] return correct slot_id
---
fhi_lib/lib/src/xran_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fhi_lib/lib/src/xran_main.c b/fhi_lib/lib/src/xran_main.c
index 17acc2a..8f5705e 100644
--- a/fhi_lib/lib/src/xran_main.c
+++ b/fhi_lib/lib/src/xran_main.c
@@ -609,6 +609,7 @@ static inline int8_t xran_check_updl_seqid(void *pHandle, uint8_t cc_id, uint8_t
uint32_t xran_slotid_convert(uint16_t slot_id, uint16_t dir) //dir = 0, from PHY slotid to xran spec slotid as defined in 5.3.2, dir=1, from xran slotid to phy slotid
{
+ return slot_id;
#ifdef FCN_ADAPT
return slot_id;
#endif
--
2.25.1
cmake_targets/tools/oran_fhi_integration_patches/bronze/oran-fhi-3-disable-pkt-validate-at-process_mbuf.patch 0 → 100644
View file @ d60809b2
From 3055c4a6cdb3ffa91deb4c6c11ecad0c95fef759 Mon Sep 17 00:00:00 2001
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
Date: Fri, 27 Jan 2023 15:46:02 +0530
Subject: [PATCH 3/4] disable pkt validate at process_mbuf
---
fhi_lib/lib/src/xran_common.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
index c4cb3fb..5bbacf7 100644
--- a/fhi_lib/lib/src/xran_common.c
+++ b/fhi_lib/lib/src/xran_common.c
@@ -192,6 +192,7 @@ int process_mbuf(struct rte_mbuf *pkt)
return MBUF_FREE;
}
+#if 0
valid_res = xran_pkt_validate(NULL,
pkt,
iq_samp_buf,
@@ -213,6 +214,7 @@ int process_mbuf(struct rte_mbuf *pkt)
print_dbg("valid_res is wrong [%d] ant %u (%u : %u : %u : %u) seq %u num_bytes %d\n", valid_res, Ant_ID, frame_id, subframe_id, slot_id, symb_id, seq.seq_id, num_bytes);
return MBUF_FREE;
}
+#endif
if (Ant_ID >= p_x_ctx->srs_cfg.eAxC_offset && p_x_ctx->fh_init.srsEnable) {
/* SRS packet has ruportid = 2*num_eAxc + ant_id */
--
2.25.1
cmake_targets/tools/oran_fhi_integration_patches/bronze/oran-fhi-4-process_all_rx_ring.patch 0 → 100644
View file @ d60809b2
From 5c99462d138042f99b3a02cec013f75bbc3732a9 Mon Sep 17 00:00:00 2001
From: "thamizhselvan.k" <thamizhselvan.k@vvdntech.in>
Date: Fri, 27 Jan 2023 15:48:25 +0530
Subject: [PATCH 4/4] process all rx ring
---
fhi_lib/lib/src/xran_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/fhi_lib/lib/src/xran_common.c b/fhi_lib/lib/src/xran_common.c
index 5bbacf7..eaefe45 100644
--- a/fhi_lib/lib/src/xran_common.c
+++ b/fhi_lib/lib/src/xran_common.c
@@ -737,8 +737,8 @@ int32_t ring_processing_func(void)
/* UP first */
for (i = 0; i < ctx->io_cfg.num_vfs && i < (XRAN_VF_MAX - 1); i = i+2){
- if (process_ring(ctx->rx_ring[i]))
- return 0;
+ process_ring(ctx->rx_ring[i]);
+ process_ring(ctx->rx_ring[i+1]);
/* CP next */
if(ctx->io_cfg.id == O_RU) /* process CP only on O-RU */
--
2.25.1
cmake_targets/tools/oran_fhi_integration_patches/bronze/oran-fhi-5-remove-not-used-dependencies.patch 0 → 100644
View file @ d60809b2
diff --git a/fhi_lib/test/common/common_typedef_xran.h b/fhi_lib/test/common/common_typedef_xran.h
index 9e84bd3..65621f5 100644
--- a/fhi_lib/test/common/common_typedef_xran.h
+++ b/fhi_lib/test/common/common_typedef_xran.h
@@ -88,7 +88,7 @@ typedef enum{
CPU_GENERIC, /*!< C */
SSE4_2, /*!< SSE4_2 */
AVX, /*!< AVX */
- AVX2, /*!< AVX2 */
+ AVX_2, /*!< AVX2 */
AVX_512, /*!< AVX512 */
}instruction_cpu_support;
diff --git a/fhi_lib/test/common/common.hpp b/fhi_lib/test/common/common.hpp
index 9b01b06..64a1baf 100644
--- a/fhi_lib/test/common/common.hpp
+++ b/fhi_lib/test/common/common.hpp
@@ -31,7 +31,7 @@
#include <rte_malloc.h>
#endif
-#include "gtest/gtest.h"
+//#include "gtest/gtest.h"
#include "common_typedef_xran.h"
@@ -106,7 +106,7 @@ json read_json_from_file(const std::string &filename);
\return Pointer to the allocated memory with data from the file.
\throws std::runtime_error when memory cannot be allocated.
*/
-char* read_data_to_aligned_array(const std::string &filename);
+//char* read_data_to_aligned_array(const std::string &filename);
/*!
\brief Measure the TSC on the machine
@@ -140,6 +140,7 @@ unsigned long tsc_tick();
values, e.g. 1, 0.001, 5e-05, etc. or filename. Depends on the get type test framework can either
read the value or load data from the file - and it happens automatically (*pff* MAGIC!).
*/
+#if 0
class KernelTests : public testing::TestWithParam<unsigned>
{
public:
@@ -827,5 +828,6 @@ T* generate_random_real_numbers(const long size, const unsigned alignment, const
return generate_random_numbers<T, std::uniform_real_distribution<T>>(size, alignment, distribution);
}
+#endif
#endif //XRANLIB_COMMON_HPP
diff --git a/fhi_lib/lib/src/xran_common.h b/fhi_lib/lib/src/xran_common.h
index 4f2928d..5028376 100644
--- a/fhi_lib/lib/src/xran_common.h
+++ b/fhi_lib/lib/src/xran_common.h
@@ -351,6 +351,7 @@ uint8_t xran_get_num_ant_elm(void *pHandle);
enum xran_category xran_get_ru_category(void *pHandle);
struct xran_device_ctx *xran_dev_get_ctx(void);
+int xran_is_prach_slot(uint32_t subframe_id, uint32_t slot_id);
int xran_register_cb_mbuf2ring(xran_ethdi_mbuf_send_fn mbuf_send_cp, xran_ethdi_mbuf_send_fn mbuf_send_up);
doc/ORAN_FHI7.2_Tutorial.md 0 → 100644
View file @ d60809b2
<table style="border-collapse: collapse; border: none;">
<tr style="border-collapse: collapse; border: none;">
<td style="border-collapse: collapse; border: none;">
<a href="http://www.openairinterface.org/">
<img src="./images/oai_final_logo.png" alt="" border=3 height=50 width=150>
</img>
</a>
</td>
<td style="border-collapse: collapse; border: none; vertical-align: center;">
<b><font size = "5">OAI 7.2 Fronthaul Interface 5G SA Tutorial</font></b>
</td>
</tr>
</table>
**Table of Contents**
[[_TOC_]]
# 1. Prerequisites
The hardware on which we have tried this tutorial:
|Hardware (CPU,RAM) |Operating System |NIC (Vendor,Driver,Firmware) |
|--------------------------------------------|----------------------------------|-------------------------------------------------|
|Intel(R) Xeon(R) Gold 6154 (2*18 Core), 64GB|RHEL 8.6 (4.18.0-372.26.1.rt7.183)|QLogic FastLinQ QL41000,qede,mbi 15.35.1 |
|Intel(R) Xeon(R) Gold 6354 18-Core, 128GB |RHEL 8.7 (4.18.0-425.10.1.rt7.220)|Intel XXV710 for 25GbE SFP28,i40e,6.02 0x80003888|
|AMD EPYC 7513 32-Core Processor, 256GB |Ubuntu 20.04 (5.4.143-rt64) |Intel X710 for 10GbE SFP+,i40e,5.04 0x80002530 |
**NOTE**: These are not minimum hardware requirements. This is the configuration of our servers.
We always set our servers to maximum performance mode.
```bash
tuned-adm profile realtime
```
For PTP grandmaster we have used Fibrolan Falcon-RX. The O-RU which we have used for this tutorial is VVDN LPRU.
## 1.1 DPDK(Data Plane Development Kit)
Download DPDK version 20.05.0
```bash
wget http://fast.dpdk.org/rel/dpdk-20.05.tar.xz
```
DPDK Compilation
```bash
tar -xvf dpdk-20.05.tar.xz
cd dpdk-20.05
meson build
cd build
sudo ninja
sudo ninja install
make install T=x86_64-native-linuxapp-gcc
```
## 1.2 Setup
We have mentioned the information for our setup but if you want more information then you can refer to below links,
1. [O-RAN-SC O-DU Setup Configuration](https://docs.o-ran-sc.org/projects/o-ran-sc-o-du-phy/en/latest/Setup-Configuration_fh.html)
2. [O-RAN Cloud Platform Reference Designs 2.0,O-RAN.WG6.CLOUD-REF-v02.00,February 2021](https://orandownloadsweb.azurewebsites.net/specifications)
### 1.2.1 RHEL
These arguments we tried on both RHEL 8.6 (4.18.0-372.26.1.rt7.183.el8_6.x86_64) and 8.7 (4.18.0-425.10.1.rt7.220.el8_7.x86_64)
Update Linux boot arguments
```bash
igb.max_vfs=2 intel_iommu=on iommu=pt intel_pstate=disable nosoftlockup tsc=nowatchdog mitigations=off cgroup_memory=1 cgroup_enable=memory mce=off idle=poll hugepagesz=1G hugepages=40 hugepagesz=2M hugepages=0 default_hugepagesz=1G selinux=0 enforcing=0 nmi_watchdog=0 softlockup_panic=0 audit=0 skew_tick=1 isolcpus=managed_irq,domain,0-2,8-17 nohz_full=0-2,8-17 rcu_nocbs=0-2,8-17 rcu_nocb_poll
```
### 1.2.1 Ubuntu
Install real timer kernel followed by updating boot arguments
```bash
isolcpus=0-2,8-17 nohz=on nohz_full=0-2,8-17 rcu_nocbs=0-2,8-17 rcu_nocb_poll nosoftlockup default_hugepagesz=1GB hugepagesz=1G hugepages=10 amd_iommu=on iommu=pt
```
Isolated CPU 0-2 are used for DPDK/ORAN and CPU 8 for `ru_thread` in our example config
## 1.3 PTP configuration
You can refer to the [following o-ran link](https://docs.o-ran-sc.org/projects/o-ran-sc-o-du-phy/en/latest/PTP-configuration_fh.html) for PTP configuration. In our setup we used Fibrolan Falcon-RX for PTP grandmaster.
```bash
git clone http://git.code.sf.net/p/linuxptp/code linuxptp
git checkout v2.0
make && make install
./ptp4l -i ens1f1 -m -H -2 -s -f configs/default.cfg
./phc2sys -w -m -s ens1f1 -R 8 -f configs/default.cfg
```
# 2. Build OAI-FHI gNB
## 2.1 Build ORAN Fronthaul Interface Library
Download ORAN FHI library
```bash
git clone https://gerrit.o-ran-sc.org/r/o-du/phy.git
cd phy
git checkout oran_release_bronze_v1.1
```
Apply patches (available in `oai_folder/cmake_targets/tools/oran_fhi_integration_patches/`)
```bash
git apply oran-fhi-1-compile-libxran-using-gcc-and-disable-avx512.patch
git apply oran-fhi-2-return-correct-slot_id.patch
git apply oran-fhi-3-disable-pkt-validate-at-process_mbuf.patch
git apply oran-fhi-4-process_all_rx_ring.patch
git apply oran-fhi-5-remove-not-used-dependencies.patch
```
Set up the environment (change the path if you use different folders)
```bash
export XRAN_LIB_DIR=~/phy/fhi_lib/lib/build
export XRAN_DIR=~/phy/fhi_lib
export RTE_SDK=~/dpdk-20.05
export RTE_TARGET=x86_64-native-linuxapp-gcc
export RTE_INCLUDE=${RTE_SDK}/${RTE_TARGET}/include
```
Compile Fronthaul Interface Library
```bash
cd phy/fhi_lib/
./build.sh
```
## 2.2 Build OAI gNB
```bash
git clone https://gitlab.eurecom.fr/oai/openairinterface5g.git
cd openairinterface5g
git checkout develop
source oaienv
cd cmake_targets
./build_oai --gNB --ninja -t oran_fhlib_5g (Add, -I if you are building for the first time on server for installing external dependencies)
```
# 3. Configure Server and OAI gNB
## 3.1 Update following in fronthaul interface configuration - oran.fhi.json
```
* DU Mac-address: Parameter o_du_macaddr
* RU MAC Address: Parameter o_ru_macaddr
* PCI address: Parameter dpdk_dev_up and dpdk_dev_cp
```
## 3.2 Copy Fronthaul Configuration File
```bash
cd ran_build/build
cp ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.fhi.json .
```
## 3.2 Bind Devices
```bash
echo "2" > /sys/class/net/ens1f1/device/sriov_numvfs
sudo ip link set ens1f1 vf 0 mac 00:11:22:33:44:66 spoofchk off
sudo ip link set ens1f1 vf 1 mac 00:11:22:33:44:66 spoofchk off
sudo modprobe vfio_pci
sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci 51:0e.0
sudo /usr/local/bin/dpdk-devbind.py --bind vfio-pci 51:0e.1
```
# 4. Run OAI gNB
## 4.1 Run OAI gNB
```bash
cd ran_build/build
sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.fh.band78.fr1.273PRB.conf --sa --reorder-thread-disable
```
openair1/PHY/defs_RU.h
View file @ d60809b2
...@@ -694,6 +694,7 @@ typedef enum { ...@@ -694,6 +694,7 @@ typedef enum {
OAI_IF4p5_only =1, OAI_IF4p5_only =1,
OAI_IF5_and_IF4p5 =2, OAI_IF5_and_IF4p5 =2,
MBP_IF5 =3, MBP_IF5 =3,
ORAN_only =4,
MAX_FH_FMTs =4 MAX_FH_FMTs =4
} FH_fmt_options_t; } FH_fmt_options_t;
......
radio/ETHERNET/oran/5g/app_bbu_main-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/app_bbu_pool-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/app_bbu_pool-G.h 0 → 100644
View file @ d60809b2
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
/**
* @brief Header file to implementation of BBU
* @file app_bbu.h
* @ingroup xran
* @author Intel Corporation
*
**/
#ifndef _APP_BBU_POOL_H_
#define _APP_BBU_POOL_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "ebbu_pool_api.h"
#include "ebbu_pool_cfg.h"
#include "config.h"
#include "xran_fh_o_du.h"
#include "xran_mlog_lnx.h"
#ifndef SUCCESS
/** SUCCESS = 0 */
#define SUCCESS 0
#endif /* #ifndef SUCCESS */
#ifndef FAILURE
/** FAILURE = 1 */
#define FAILURE 1
#endif /* #ifndef FAILURE */
#define MAX_NEXT_TASK_NUM 8
#define MAX_TEST_CTX 4
#define MAX_TEST_SPLIT_NUM 55 // then largest 1000 events per TTI by pre-defined event chain
#define EVENT_NAME(EVENT_TYPE) #EVENT_TYPE
#define MAX_PHY_INSTANCES ( 24 )
#define MAX_NUM_OF_SF_5G_CTX ( 8 )
/******Processing Latencies***/
#define DL_PROC_ADVANCE_MU0 ( 1 )
#define DL_PROC_ADVANCE_MU1 ( 2 )
#define DL_PROC_ADVANCE_MU3 ( 2 )
#define UL_PROC_ADVANCE_MU0 ( 1 )
#define UL_PROC_ADVANCE_MU1 ( 1 )
#define UL_PROC_ADVANCE_MU3 ( 1 )
extern uint32_t gMaxSlotNum[MAX_PHY_INSTANCES];
extern uint32_t gNumDLCtx[MAX_PHY_INSTANCES];
extern uint32_t gNumULCtx[MAX_PHY_INSTANCES];
extern uint32_t gNumDLBufferCtx[MAX_PHY_INSTANCES];
extern uint32_t gNumULBufferCtx[MAX_PHY_INSTANCES];
extern uint32_t gDLProcAdvance[MAX_PHY_INSTANCES];
extern int32_t gULProcAdvance[MAX_PHY_INSTANCES];
#define get_dl_sf_idx(nSlotNum, nCellIdx) ((nSlotNum + gDLProcAdvance[nCellIdx]) % gMaxSlotNum[nCellIdx])
#define get_ul_sf_idx(nSlotNum, nCellIdx) ((nSlotNum + gULProcAdvance[nCellIdx]) % gMaxSlotNum[nCellIdx])
#define get_dl_sf_ctx(nSlotNum, nCellIdx) (nSlotNum % gNumDLCtx[nCellIdx])
#define get_ul_sf_ctx(nSlotNum, nCellIdx) (nSlotNum % gNumULCtx[nCellIdx])
typedef enum
{
TTI_START = 0, /* 0 First task that will schedule all the other tasks for all Cells */
SYM2_WAKE_UP, /* 1 Sym2 Arrival which will wake up UL Tasks for all cells */
SYM6_WAKE_UP, /* 2 Sym6 Arrival which will wake up UL Tasks for all cells */
SYM11_WAKE_UP, /* 3 Sym11 Arrival which will wake up UL Tasks for all cells */
SYM13_WAKE_UP, /* 4 Sym13 Arrival which will wake up UL Tasks for all cells */
PRACH_WAKE_UP, /* 5 PRACH Arrival which will wake up will wake up PRACH for all cells */
SRS_WAKE_UP, /* 6 (Massive MIMO) SRS Arrival which will wake up SRS Decompression for all cells */
DL_CONFIG, /* 7 */
DL_PDSCH_TB, /* 8 */
DL_PDSCH_SCRM, /* 9 */
DL_PDSCH_SYM, /* 10 */
DL_PDSCH_RS, /* 11 */
DL_CTRL, /* 12 */
UL_CONFIG, /* 13 */
UL_IQ_DECOMP2, /* 14 */
UL_IQ_DECOMP6, /* 15 */
UL_IQ_DECOMP11, /* 16 */
UL_IQ_DECOMP13, /* 17 */
UL_PUSCH_CE0, /* 18 */
UL_PUSCH_CE7, /* 19 */
UL_PUSCH_EQL0, /* 20 */
UL_PUSCH_EQL7, /* 21 */
UL_PUSCH_LLR, /* 22 */
UL_PUSCH_DEC, /* 23 */
UL_PUSCH_TB, /* 24 */
UL_PUCCH, /* 25 */
UL_PRACH, /* 26 */
UL_SRS_DECOMP, /* 27 */
UL_SRS_CE, /* 28 */
UL_SRS_POST, /* 29 */
DL_POST, /* 30 */
UL_POST, /* 31 */
DL_BEAM_GEN, /* 32 */
DL_BEAM_TX, /* 33 */
UL_BEAM_GEN, /* 34 */
UL_BEAM_TX, /* 35 */
MAX_TASK_NUM_G_NB /* 36 */
} TaskTypeEnum;
///defines the parameters that multi-tasks are generated.
typedef struct
{
/*! Indicate how many tasks of the generating type. 1 means that no task splitting. */
uint16_t nTaskNum;
/*! the parameter list for each splitted task */
void *pTaskExePara[MAX_TEST_SPLIT_NUM];
} TaskPreGen;
typedef enum
{
RB_SPLIT = 0,
UE_GROUP_SPLIT = 1,
LAYER_SPLIT = 2,
UE_SPLIT = 3,
PORT_SPLIT = 4,
CE_RX_SPLIT = 5,
OFDM_SYMB_SPLIT = 6
} TaskSplitType;
typedef struct tSampleSplitStruct
{
int16_t nGroupStart;
int16_t nGroupNum;
int16_t nUeStart;
int16_t nUeNum;
int16_t nSymbStart;
int16_t nSymbNum;
int16_t nLayerStart;
int16_t nLayerNum;
int16_t nSplitIndex;
TaskSplitType eSplitType;
} SampleSplitStruct;
typedef struct
{
int32_t eventChainDepth;
int32_t nextEventChain[MAX_TASK_NUM_G_NB][MAX_NEXT_TASK_NUM];
int32_t nextEventCount[MAX_TASK_NUM_G_NB];
int32_t preEventCount[MAX_TASK_NUM_G_NB];
int32_t preEventCountSave[MAX_TASK_NUM_G_NB];
int32_t preEventStat[MAX_TASK_NUM_G_NB];
} __attribute__((aligned(IA_ALIGN))) EventChainDescStruct;
typedef void (*PreEventExeFunc) (uint32_t nSfIdx, uint16_t nCellIdx, TaskPreGen *pPara);
typedef struct
{
int32_t nEventId;
char sTaskName[32];
int32_t nEventPrio;
EventExeFunc pEventFunc;
PreEventExeFunc pPreEventFunc;
uint32_t nWakeOnExtrernalEvent;
uint32_t nPrefetchFlag;
uint32_t nCoreMaskType;
uint64_t nCoreMask0;
uint64_t nCoreMask1;
//uint64_t nCoreMask2;
//uint64_t nCoreMask3;
//uint64_t nCoreMask4;
//uint64_t nCoreMask5;
//uint64_t nCoreMask6;
//uint64_t nCoreMask7;
} __attribute__((aligned(IA_ALIGN))) EventConfigStruct;
typedef struct
{
int32_t nEventId;
int32_t nSplitIdx;
int32_t nCellIdx;
int32_t nSlotIdx;
void *pTaskPara;
void *pHandler;
float *dummy0;
uint64_t tSendTime;
uint8_t nBuffer[240];
} __attribute__((aligned(IA_ALIGN))) EventCtrlStruct;
typedef struct
{
int32_t nEventId;
int32_t nEventPrio;
EventExeFunc pEventFunc;
} __attribute__((aligned(IA_ALIGN))) EventInfo;
typedef struct
{
int32_t nCellInd;
EventStruct *pEventStruct;
int16_t *pCEtp;
int16_t *pMIMOouttp;
int16_t *pWeighttp;
} __attribute__((aligned(IA_ALIGN))) gNBCellStruct;
extern EventChainDescStruct gEventChain[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX];
extern EventCtrlStruct gEventCtrl[EBBU_POOL_MAX_TEST_CELL][MAX_TEST_CTX][MAX_TASK_NUM_G_NB][MAX_TEST_SPLIT_NUM];
int32_t event_chain_gen(EventChainDescStruct *psEventChain);
int32_t event_chain_reset(EventChainDescStruct *psEventChain);
int32_t test_buffer_create();
eBbuPoolHandler app_get_ebbu_pool_handler(void);
int32_t app_bbu_init(int argc, char *argv[], char cfgName[512], UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg[],
uint64_t nActiveCoreMask[EBBUPOOL_MAX_CORE_MASK]);
int32_t app_bbu_close(void);
int32_t app_bbu_dl_tti_call_back(void * param);
int32_t test_func_gen(eBbuPoolHandler pHandler, int32_t nCell, int32_t nSlot, int32_t eventId);
int32_t next_event_unlock(void *pCookies);
/** tasks */
int32_t app_bbu_pool_task_dl_post(void *pCookies);
void app_bbu_pool_pre_task_dl_post(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara);
int32_t app_bbu_pool_task_dl_config(void *pCookies);
void app_bbu_pool_pre_task_dl_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara);
int32_t app_bbu_pool_task_ul_config(void * pCookies);
void app_bbu_pool_pre_task_ul_cfg(uint32_t nSubframe, uint16_t nCellIdx, TaskPreGen *pPara);
int32_t app_bbu_pool_task_sym2_wakeup(void *pCookies);
int32_t app_bbu_pool_task_sym6_wakeup(void *pCookies);
int32_t app_bbu_pool_task_sym11_wakeup(void *pCookies);
int32_t app_bbu_pool_task_sym13_wakeup(void *pCookies);
int32_t app_bbu_pool_task_prach_wakeup(void *pCookies);
int32_t app_bbu_pool_task_srs_wakeup(void *pCookies);
void app_io_xran_fh_bbu_rx_callback(void *pCallbackTag, xran_status_t status);
void app_io_xran_fh_bbu_rx_bfw_callback(void *pCallbackTag, xran_status_t status);
void app_io_xran_fh_bbu_rx_prach_callback(void *pCallbackTag, xran_status_t status);
void app_io_xran_fh_bbu_rx_srs_callback(void *pCallbackTag, xran_status_t status);
#ifdef __cplusplus
}
#endif
#endif /*_APP_BBU_POOL_H_*/
\ No newline at end of file
radio/ETHERNET/oran/5g/app_dl_bbu_pool_tasks-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/app_io_fh_xran-E.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/app_io_fh_xran-E.h 0 → 100644
View file @ d60809b2
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
/**
* @brief Header file to interface implementation to ORAN FH from Application side
* @file app_iof_fh_xran.h
* @ingroup xran
* @author Intel Corporation
*
**/
#ifndef _APP_IO_FH_H_
#define _APP_IO_FH_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <unistd.h>
#include "config.h"
#include "xran_fh_o_du.h"
#include "xran_pkt_up.h"
#define MAX_PKT_BURST (448+4) /* 4x14x8 */
#define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST
#define NUM_OF_SUBFRAME_PER_FRAME (10)
#define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024
#define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024
#define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024
#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
extern void* app_io_xran_handle;
extern struct xran_fh_init app_io_xran_fh_init;
extern struct xran_fh_config app_io_xran_fh_config[XRAN_PORTS_NUM];
typedef struct
{
uint32_t phaseFlag :1;
uint32_t NRARFCN :22;
uint32_t SULFreShift :1;
uint32_t SULFlag :1;
uint32_t rsv :7;
} FPGAPhaseCompCfg;
typedef enum {
XRANFTHTX_OUT = 0,
XRANFTHTX_PRB_MAP_OUT,
XRANFTHTX_SEC_DESC_OUT,
XRANFTHRX_IN,
XRANFTHRX_PRB_MAP_IN,
XRANFTHTX_SEC_DESC_IN,
XRANFTHRACH_IN,
XRANSRS_IN,
XRANSRS_PRB_MAP_IN,
XRANSRS_SEC_DESC_IN,
MAX_SW_XRAN_INTERFACE_NUM
} SWXRANInterfaceTypeEnum;
struct xran_io_buf_ctrl {
/* -1-this subframe is not used in current frame format
0-this subframe can be transmitted, i.e., data is ready
1-this subframe is waiting transmission, i.e., data is not ready
10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
set bValid to 10.
*/
int32_t bValid ; // when UL rx, it is subframe index.
int32_t nSegToBeGen;
int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
// -1 means that DL packet to be transmitted is not ready in BS
int32_t nSegTransferred; // number of data segments has been transmitted or received
struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
struct xran_buffer_list sBufferList;
};
struct xran_io_shared_ctrl {
/* io struct */
struct xran_io_buf_ctrl sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFHPrachRxBbuIoBufCtrlDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
/* Cat B */
struct xran_io_buf_ctrl sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
struct xran_io_buf_ctrl sFHSrsRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
/* buffers lists */
struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFHPrachRxBuffersDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
/* Cat B SRS buffers */
struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFHSrsRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
};
struct bbu_xran_io_if {
void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; /**< instance per ORAN port per CC */
uint32_t nBufPoolIndex[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; /**< unique buffer pool */
uint16_t nInstanceNum[XRAN_PORTS_NUM]; /**< instance is equivalent to CC */
uint16_t DynamicSectionEna;
uint32_t nPhaseCompFlag;
int32_t num_o_ru;
int32_t num_cc_per_port[XRAN_PORTS_NUM];
int32_t map_cell_id2port[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
struct xran_io_shared_ctrl ioCtrl[XRAN_PORTS_NUM]; /**< for each O-RU port */
struct xran_cb_tag RxCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
struct xran_cb_tag PrachCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
struct xran_cb_tag SrsCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
};
struct bbu_xran_io_if* app_io_xran_if_alloc(void);
struct bbu_xran_io_if* app_io_xran_if_get(void);
void app_io_xran_if_free(void);
struct xran_io_shared_ctrl * app_io_xran_if_ctrl_get(uint32_t o_xu_id);
int32_t app_io_xran_sfidx_get(uint8_t nNrOfSlotInSf);
int32_t app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig* p_use_cfg);
int32_t app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg);
int32_t app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg);
int32_t app_io_xran_eAxCid_conf_set(struct xran_eaxcid_config *p_eAxC_cfg, RuntimeConfig * p_s_cfg);
int32_t app_io_xran_fh_config_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, struct xran_fh_init* p_xran_fh_init, struct xran_fh_config* p_xran_fh_cfg);
int32_t app_io_xran_fh_init_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, struct xran_fh_init* p_xran_fh_init);
int32_t app_io_xran_buffers_max_sz_set (RuntimeConfig* p_o_xu_cfg);
int32_t app_io_xran_dl_tti_call_back(void * param);
int32_t app_io_xran_ul_half_slot_call_back(void * param);
int32_t app_io_xran_ul_full_slot_call_back(void * param);
int32_t app_io_xran_ul_custom_sym_call_back(void * param, struct xran_sense_of_time* time);
void app_io_xran_if_stop(void);
#ifdef __cplusplus
}
#endif
#endif /* _APP_IO_FH_H_ */
radio/ETHERNET/oran/5g/app_io_fh_xran-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/app_io_fh_xran-G.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/app_io_fh_xran.h 0 → 100644
View file @ d60809b2
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
/**
* @brief Header file to interface implementation to ORAN FH from Application side
* @file app_iof_fh_xran.h
* @ingroup xran
* @author Intel Corporation
*
**/
#ifndef _APP_IO_FH_H_
#define _APP_IO_FH_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <unistd.h>
#include "config.h"
#include "xran_fh_o_du.h"
#include "xran_pkt_up.h"
#define MAX_PKT_BURST (448+4) /* 4x14x8 */
#define N_MAX_BUFFER_SEGMENT MAX_PKT_BURST
#define NUM_OF_SUBFRAME_PER_FRAME (10)
#define SW_FPGA_TOTAL_BUFFER_LEN 4*1024*1024*1024
#define SW_FPGA_SEGMENT_BUFFER_LEN 1*1024*1024*1024
#define SW_FPGA_FH_TOTAL_BUFFER_LEN 1*1024*1024*1024
#define FPGA_TO_SW_PRACH_RX_BUFFER_LEN (8192)
extern void* app_io_xran_handle;
extern struct xran_fh_init app_io_xran_fh_init;
extern struct xran_fh_config app_io_xran_fh_config[XRAN_PORTS_NUM];
typedef struct
{
uint32_t phaseFlag :1;
uint32_t NRARFCN :22;
uint32_t SULFreShift :1;
uint32_t SULFlag :1;
uint32_t rsv :7;
} FPGAPhaseCompCfg;
typedef enum {
XRANFTHTX_OUT = 0,
XRANFTHTX_PRB_MAP_OUT,
XRANFTHTX_SEC_DESC_OUT,
XRANFTHRX_IN,
XRANFTHRX_PRB_MAP_IN,
XRANFTHTX_SEC_DESC_IN,
XRANFTHRACH_IN,
XRANSRS_IN,
XRANSRS_PRB_MAP_IN,
XRANSRS_SEC_DESC_IN,
MAX_SW_XRAN_INTERFACE_NUM
} SWXRANInterfaceTypeEnum;
struct xran_io_buf_ctrl {
/* -1-this subframe is not used in current frame format
0-this subframe can be transmitted, i.e., data is ready
1-this subframe is waiting transmission, i.e., data is not ready
10 - DL transmission missing deadline. When FE needs this subframe data but bValid is still 1,
set bValid to 10.
*/
int32_t bValid ; // when UL rx, it is subframe index.
int32_t nSegToBeGen;
int32_t nSegGenerated; // how many date segment are generated by DL LTE processing or received from FE
// -1 means that DL packet to be transmitted is not ready in BS
int32_t nSegTransferred; // number of data segments has been transmitted or received
struct rte_mbuf *pData[N_MAX_BUFFER_SEGMENT]; // point to DPDK allocated memory pool
struct xran_buffer_list sBufferList;
};
struct xran_io_shared_ctrl {
/* io struct */
struct xran_io_buf_ctrl sFrontHaulTxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFrontHaulTxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFrontHaulRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFrontHaulRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFHPrachRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_io_buf_ctrl sFHPrachRxBbuIoBufCtrlDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
/* Cat B */
struct xran_io_buf_ctrl sFHSrsRxBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
struct xran_io_buf_ctrl sFHSrsRxPrbMapBbuIoBufCtrl[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
/* buffers lists */
struct xran_flat_buffer sFrontHaulTxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFrontHaulTxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_flat_buffer sFrontHaulRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFrontHaulRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR];
struct xran_flat_buffer sFHPrachRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFHPrachRxBuffersDecomp[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANTENNA_NR][XRAN_NUM_OF_SYMBOL_PER_SLOT];
/* Cat B SRS buffers */
struct xran_flat_buffer sFHSrsRxBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR][XRAN_MAX_NUM_OF_SRS_SYMBOL_PER_SLOT];
struct xran_flat_buffer sFHSrsRxPrbMapBuffers[XRAN_N_FE_BUF_LEN][XRAN_MAX_SECTOR_NR][XRAN_MAX_ANT_ARRAY_ELM_NR];
};
struct bbu_xran_io_if {
void* nInstanceHandle[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR]; /**< instance per ORAN port per CC */
uint32_t nBufPoolIndex[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR][MAX_SW_XRAN_INTERFACE_NUM]; /**< unique buffer pool */
uint16_t nInstanceNum[XRAN_PORTS_NUM]; /**< instance is equivalent to CC */
uint16_t DynamicSectionEna;
uint32_t nPhaseCompFlag;
int32_t num_o_ru;
int32_t num_cc_per_port[XRAN_PORTS_NUM];
int32_t map_cell_id2port[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
struct xran_io_shared_ctrl ioCtrl[XRAN_PORTS_NUM]; /**< for each O-RU port */
struct xran_cb_tag RxCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
struct xran_cb_tag PrachCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
struct xran_cb_tag SrsCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
};
struct bbu_xran_io_if* app_io_xran_if_alloc(void);
struct bbu_xran_io_if* app_io_xran_if_get(void);
void app_io_xran_if_free(void);
struct xran_io_shared_ctrl * app_io_xran_if_ctrl_get(uint32_t o_xu_id);
int32_t app_io_xran_sfidx_get(uint8_t nNrOfSlotInSf);
int32_t app_io_xran_interface(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg, UsecaseConfig* p_use_cfg);
int32_t app_io_xran_iq_content_init(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg);
int32_t app_io_xran_iq_content_get(uint32_t o_xu_id, RuntimeConfig *p_o_xu_cfg);
int32_t app_io_xran_eAxCid_conf_set(struct xran_eaxcid_config *p_eAxC_cfg, RuntimeConfig * p_s_cfg);
int32_t app_io_xran_fh_config_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, struct xran_fh_init* p_xran_fh_init, struct xran_fh_config* p_xran_fh_cfg);
int32_t app_io_xran_fh_init_init(UsecaseConfig* p_use_cfg, RuntimeConfig* p_o_xu_cfg, struct xran_fh_init* p_xran_fh_init);
int32_t app_io_xran_buffers_max_sz_set (RuntimeConfig* p_o_xu_cfg);
int32_t app_io_xran_dl_tti_call_back(void * param);
int32_t app_io_xran_ul_half_slot_call_back(void * param);
int32_t app_io_xran_ul_full_slot_call_back(void * param);
int32_t app_io_xran_ul_custom_sym_call_back(void * param, struct xran_sense_of_time* time);
void app_io_xran_if_stop(void);
#ifdef __cplusplus
}
#endif
#endif /* _APP_IO_FH_H_ */
radio/ETHERNET/oran/5g/app_profile_xran-G.h 0 → 100644
View file @ d60809b2
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
#ifndef _APP_PROFILE_XRAN_H_
#define _APP_PROFILE_XRAN_H_
#include "config.h"
#ifdef __cplusplus
extern "C" {
#endif
struct xran_mlog_times
{
uint64_t ticks_per_usec;
uint64_t core_total_time; /* in us */
uint64_t core_used_time; /* in us */
uint64_t xran_total_time; /* in us */
uint64_t mlog_total_time; /* in us */
};
struct xran_mlog_stats
{
uint32_t cnt;
uint32_t max;
uint32_t min;
float avg;
};
struct xran_mlog_taskid
{
uint16_t taskId;
uint16_t taskType;
char taskName[80];
};
enum xran_mlog_task_type {
XRAN_TASK_TYPE_GNB = 0,
XRAN_TASK_TYPE_BBDEV,
XRAN_TASK_TYPE_TIMER,
XRAN_TASK_TYPE_RADIO,
XRAN_TASK_TYPE_CP,
XRAN_TASK_TYPE_UP,
XRAN_TASK_TYPE_MAX, /* The last entry : total# of types */
};
#define XRAN_REPORT_FILE "xran_mlog_stats"
#ifdef MLOG_ENABLED
int32_t app_profile_xran_print_mlog_stats(char *usecase_file);
#else
#define app_profile_xran_print_mlog_stats(a)
#endif
#ifndef WIN32
#ifdef PRINTF_ERR_OK
#define print_err(fmt, args...) printf("%s:[err] " fmt "\n", __FUNCTION__, ## args)
#else /* PRINTF_LOG_OK */
#define print_err(fmt, args...)
#endif /* PRINTF_LOG_OK */
#else
#define print_err(fmt, ...) printf("%s:[err] " fmt "\n", __FUNCTION__, __VA_ARGS__)
#endif
#ifdef __cplusplus
}
#endif
extern struct xran_mlog_times mlog_times;
#endif /* _APP_PROFILE_XRAN_ */
radio/ETHERNET/oran/5g/app_ul_bbu_pool_tasks-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/cmdparse.c 0 → 100644
View file @ d60809b2
#include <stdio.h>
#include <string.h>
void make_args(char **argv, int *argc, char *string)
{
char tmp[1024]={0x0};
FILE *cmd=NULL;
int i=0;
char *p=NULL;
sprintf(tmp, "set - %s && for i in %c$@%c;\n do\n echo $i\ndone",string, '"', '"');
cmd=popen(tmp, "r");
while (fgets(tmp, sizeof(tmp), cmd)!=NULL)
{
p=strchr(tmp, '\n');
if (p!=NULL) *p=0x0;
argv[i] = malloc(strlen(tmp));
strcpy(argv[i++], tmp);
}
*argc=i;
}
radio/ETHERNET/oran/5g/common-E.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/common-E.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/common-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/common-G.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/common.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/common_bronze.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/common_bronze.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config-E.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config-E.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config-G.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config_bronze.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/config_bronze.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/debug-E.h 0 → 100644
View file @ d60809b2
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
/**
* @brief
* @file
* @ingroup
* @author Intel Corporation
**/
#ifndef _SAMPLEAPP__DEBUG_H_
#define _SAMPLEAPP__DEBUG_H_
#include <stdio.h>
#include "config.h"
#define MAX_FILE_NAME_LEN (512)
#define MAX_PATH_NAME_LEN (1024)
#ifdef _DEBUG
#define log_dbg(fmt, ...) \
fprintf(stderr, \
"DEBUG: %s(%d): " fmt "\n", \
__FILE__, \
__LINE__, ##__VA_ARGS__)
#else
#define log_dbg(fmt, ...)
#endif
#if defined(_DEBUG) || defined(_VERBOSE)
#define log_wrn(fmt, ...) \
fprintf( \
stderr, \
"WARNING: %s(%d): " fmt "\n", \
__FILE__, \
__LINE__, ##__VA_ARGS__)
#else
#define log_dbg(fmt, ...)
#define log_wrn(fmt, ...)
#endif
#define log_err(fmt, ...) \
fprintf(stderr, \
"ERROR: %s(%d): " fmt "\n", \
__FILE__, \
__LINE__, ##__VA_ARGS__)
inline void ShowData(void* ptr, unsigned int size)
{
uint8_t *d = (uint8_t *)ptr;
unsigned int i;
for(i = 0; i < size; i++)
{
if ( !(i & 0xf) )
printf("\n");
printf("%02x ", d[i]);
}
printf("\n");
}
#endif /* _SAMPLEAPP__DEBUG_H_ */
radio/ETHERNET/oran/5g/debug-G.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/debug.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/debug_bronze.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/oaioran.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/oaioran.h 0 → 100644
View file @ d60809b2
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
typedef struct {
uint32_t tti;
uint32_t sl;
uint32_t f;
} oran_sync_info_t;
radio/ETHERNET/oran/5g/oran.cpp 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/oran.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/oran_isolate.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/oran_isolate.h 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/sample-app-E.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/sample-app-G.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/sample-app-bronze.c 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/xran_lib_wrap.cpp 0 → 100644
View file @ d60809b2
This diff is collapsed.
radio/ETHERNET/oran/5g/xran_lib_wrap.hpp 0 → 100644
View file @ d60809b2
This diff is collapsed.
targets/PROJECTS/GENERIC-NR-5GC/CONF/oran.fhi.json 0 → 100644
View file @ d60809b2
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment