Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
zzha zzha
OpenXG-RAN
Commits
e45855f4
Commit
e45855f4
authored
Aug 19, 2023
by
francescomani
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
handling reserved case of DLSCH MCS
parent
26bceb22
Changes
4
Hide whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
40 additions
and
27 deletions
+40
-27
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+18
-7
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+2
-2
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+4
-4
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+16
-14
No files found.
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @
e45855f4
...
@@ -100,17 +100,23 @@ static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
...
@@ -100,17 +100,23 @@ static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
LOG_D
(
PHY
,
"DLSCH %d in error
\n
"
,
rdata
->
dlsch_id
);
LOG_D
(
PHY
,
"DLSCH %d in error
\n
"
,
rdata
->
dlsch_id
);
}
}
uint32_t
tbs
;
if
(
dlsch
->
dlsch_config
.
targetCodeRate
>
0
)
tbs
=
dlsch
->
dlsch_config
.
TBS
;
else
tbs
=
harq_process
->
tb_size
;
// if all segments are done
// if all segments are done
if
(
last
)
{
if
(
last
)
{
kpiStructure
.
nb_total
++
;
kpiStructure
.
nb_total
++
;
kpiStructure
.
blockSize
=
dlsch
->
dlsch_config
.
TBS
;
kpiStructure
.
blockSize
=
tbs
;
kpiStructure
.
dl_mcs
=
dlsch
->
dlsch_config
.
mcs
;
kpiStructure
.
dl_mcs
=
dlsch
->
dlsch_config
.
mcs
;
kpiStructure
.
nofRBs
=
dlsch
->
dlsch_config
.
number_rbs
;
kpiStructure
.
nofRBs
=
dlsch
->
dlsch_config
.
number_rbs
;
if
(
*
num_seg_ok
==
harq_process
->
C
)
{
if
(
*
num_seg_ok
==
harq_process
->
C
)
{
if
(
harq_process
->
C
>
1
)
{
if
(
harq_process
->
C
>
1
)
{
/* check global CRC */
/* check global CRC */
int
A
=
dlsch
->
dlsch_config
.
TBS
;
int
A
=
tbs
;
int
crc_length
=
A
>
3824
?
3
:
2
;
int
crc_length
=
A
>
3824
?
3
:
2
;
int
crc_type
=
A
>
3824
?
CRC24_A
:
CRC16
;
int
crc_type
=
A
>
3824
?
CRC24_A
:
CRC16
;
if
(
!
check_crc
(
b
,
A
+
crc_length
*
8
,
crc_type
))
{
if
(
!
check_crc
(
b
,
A
+
crc_length
*
8
,
crc_type
))
{
...
@@ -149,9 +155,8 @@ static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
...
@@ -149,9 +155,8 @@ static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
}
}
return
true
;
//stop
return
true
;
//stop
}
}
else
else
{
{
return
false
;
//not last one
return
false
;
//not last one
}
}
}
}
...
@@ -292,7 +297,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
...
@@ -292,7 +297,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t
harq_pid
,
uint8_t
harq_pid
,
int
b_size
,
int
b_size
,
uint8_t
b
[
b_size
])
{
uint8_t
b
[
b_size
])
{
uint32_t
A
,
E
;
uint32_t
E
;
uint32_t
G
;
uint32_t
G
;
uint32_t
ret
,
offset
;
uint32_t
ret
,
offset
;
uint32_t
r
,
r_offset
=
0
,
Kr
=
8424
,
Kr_bytes
;
uint32_t
r
,
r_offset
=
0
,
Kr
=
8424
,
Kr_bytes
;
...
@@ -355,7 +360,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
...
@@ -355,7 +360,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
}
}
*/
*/
nb_rb
=
dlsch
->
dlsch_config
.
number_rbs
;
nb_rb
=
dlsch
->
dlsch_config
.
number_rbs
;
A
=
dlsch
->
dlsch_config
.
TBS
;
uint32_t
A
;
if
(
dlsch
->
dlsch_config
.
targetCodeRate
>
0
)
{
A
=
dlsch
->
dlsch_config
.
TBS
;
harq_process
->
tb_size
=
A
;
}
else
A
=
harq_process
->
tb_size
;
ret
=
dlsch
->
max_ldpc_iterations
+
1
;
ret
=
dlsch
->
max_ldpc_iterations
+
1
;
dlsch
->
last_iteration_cnt
=
ret
;
dlsch
->
last_iteration_cnt
=
ret
;
harq_process
->
G
=
nr_get_G
(
nb_rb
,
nb_symb_sch
,
nb_re_dmrs
,
dmrs_length
,
dlsch
->
dlsch_config
.
qamModOrder
,
dlsch
->
Nl
);
harq_process
->
G
=
nr_get_G
(
nb_rb
,
nb_symb_sch
,
nb_re_dmrs
,
dmrs_length
,
dlsch
->
dlsch_config
.
qamModOrder
,
dlsch
->
Nl
);
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
View file @
e45855f4
...
@@ -117,8 +117,6 @@ typedef struct {
...
@@ -117,8 +117,6 @@ typedef struct {
uint8_t
Ndi
;
uint8_t
Ndi
;
/// DLSCH status flag indicating
/// DLSCH status flag indicating
SCH_status_t
status
;
SCH_status_t
status
;
/// Transport block size
uint32_t
TBS
;
/// The payload + CRC size in bits
/// The payload + CRC size in bits
uint32_t
B
;
uint32_t
B
;
/// Pointers to transport block segments
/// Pointers to transport block segments
...
@@ -146,6 +144,8 @@ typedef struct {
...
@@ -146,6 +144,8 @@ typedef struct {
/// Used for computing LDPC decoder R
/// Used for computing LDPC decoder R
int
llrLen
;
int
llrLen
;
decode_abort_t
abort_decode
;
decode_abort_t
abort_decode
;
// TB size
uint32_t
tb_size
;
}
NR_DL_UE_HARQ_t
;
}
NR_DL_UE_HARQ_t
;
typedef
struct
{
typedef
struct
{
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
e45855f4
...
@@ -130,7 +130,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
...
@@ -130,7 +130,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
dl_harq0
=
&
ue
->
dl_harq_processes
[
0
][
dlsch0
->
dlsch_config
.
harq_process_nbr
];
dl_harq0
=
&
ue
->
dl_harq_processes
[
0
][
dlsch0
->
dlsch_config
.
harq_process_nbr
];
trace_NRpdu
(
DIRECTION_DOWNLINK
,
trace_NRpdu
(
DIRECTION_DOWNLINK
,
b
,
b
,
dl
sch0
->
dlsch_config
.
TBS
/
8
,
dl
_harq0
->
tb_size
/
8
,
t
,
t
,
dlsch0
->
rnti
,
dlsch0
->
rnti
,
proc
->
frame_rx
,
proc
->
frame_rx
,
...
@@ -146,7 +146,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
...
@@ -146,7 +146,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
harq_pid
=
dlsch0
->
dlsch_config
.
harq_process_nbr
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
harq_pid
=
dlsch0
->
dlsch_config
.
harq_process_nbr
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
ack_nack
=
dl_harq0
->
ack
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
ack_nack
=
dl_harq0
->
ack
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
pdu
=
b
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
pdu
=
b
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
pdu_length
=
dl
sch0
->
dlsch_config
.
TBS
/
8
;
rx_ind
->
rx_indication_body
[
n_pdus
-
1
].
pdsch_pdu
.
pdu_length
=
dl
_harq0
->
tb_size
/
8
;
}
}
if
(
dlsch1
)
{
if
(
dlsch1
)
{
AssertFatal
(
1
==
0
,
"Second codeword currently not supported
\n
"
);
AssertFatal
(
1
==
0
,
"Second codeword currently not supported
\n
"
);
...
@@ -762,7 +762,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
...
@@ -762,7 +762,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
nr_fill_dl_indication
(
&
dl_indication
,
NULL
,
&
rx_ind
,
proc
,
ue
,
NULL
);
nr_fill_dl_indication
(
&
dl_indication
,
NULL
,
&
rx_ind
,
proc
,
ue
,
NULL
);
nr_fill_rx_indication
(
&
rx_ind
,
ind_type
,
ue
,
&
dlsch
[
0
],
NULL
,
number_pdus
,
proc
,
NULL
,
p_b
);
nr_fill_rx_indication
(
&
rx_ind
,
ind_type
,
ue
,
&
dlsch
[
0
],
NULL
,
number_pdus
,
proc
,
NULL
,
p_b
);
LOG_D
(
PHY
,
"DL PDU length in bits: %d, in bytes: %d
\n
"
,
dl
sch
[
0
].
dlsch_config
.
TBS
,
dlsch
[
0
].
dlsch_config
.
TBS
/
8
);
LOG_D
(
PHY
,
"DL PDU length in bits: %d, in bytes: %d
\n
"
,
dl
_harq0
->
tb_size
,
dl_harq0
->
tb_size
/
8
);
stop_meas
(
&
ue
->
dlsch_decoding_stats
);
stop_meas
(
&
ue
->
dlsch_decoding_stats
);
if
(
cpumeas
(
CPUMEAS_GETSTATE
))
{
if
(
cpumeas
(
CPUMEAS_GETSTATE
))
{
...
@@ -812,7 +812,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
...
@@ -812,7 +812,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D
(
PHY
,
"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f
\n
"
,
LOG_D
(
PHY
,
"AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f
\n
"
,
frame_rx
%
1024
,
nr_slot_rx
,(
ue
->
dlsch_decoding_stats
.
p_time
)
/
(
cpuf
*
1000
.
0
));
frame_rx
%
1024
,
nr_slot_rx
,(
ue
->
dlsch_decoding_stats
.
p_time
)
/
(
cpuf
*
1000
.
0
));
}
}
LOG_D
(
PHY
,
"harq_pid: %d, TBS expected dlsch1: %d
\n
"
,
harq_pid
,
dl
sch
[
1
].
dlsch_config
.
TBS
);
LOG_D
(
PHY
,
"harq_pid: %d, TBS expected dlsch1: %d
\n
"
,
harq_pid
,
dl
_harq1
->
tb_size
);
}
}
// send to mac
// send to mac
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
e45855f4
...
@@ -688,19 +688,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -688,19 +688,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0
->
qamModOrder
=
nr_get_Qm_dl
(
dlsch_config_pdu_1_0
->
mcs
,
dlsch_config_pdu_1_0
->
mcs_table
);
dlsch_config_pdu_1_0
->
qamModOrder
=
nr_get_Qm_dl
(
dlsch_config_pdu_1_0
->
mcs
,
dlsch_config_pdu_1_0
->
mcs_table
);
int
R
=
nr_get_code_rate_dl
(
dlsch_config_pdu_1_0
->
mcs
,
dlsch_config_pdu_1_0
->
mcs_table
);
int
R
=
nr_get_code_rate_dl
(
dlsch_config_pdu_1_0
->
mcs
,
dlsch_config_pdu_1_0
->
mcs_table
);
dlsch_config_pdu_1_0
->
targetCodeRate
=
R
;
dlsch_config_pdu_1_0
->
targetCodeRate
=
R
;
if
(
dlsch_config_pdu_1_0
->
targetCodeRate
==
0
||
dlsch_config_pdu_1_0
->
qamModOrder
==
0
)
{
if
(
dlsch_config_pdu_1_0
->
qamModOrder
==
0
)
{
LOG_W
(
MAC
,
"Invalid code rate or Mod order, likely due to unexpected DL DCI.
\n
"
);
LOG_W
(
MAC
,
"Invalid code rate or Mod order, likely due to unexpected DL DCI.
\n
"
);
return
-
1
;
return
-
1
;
}
}
int
nb_rb_oh
=
0
;
// it was not computed at UE side even before and set to 0 in nr_compute_tbs
int
nb_rb_oh
=
0
;
// it was not computed at UE side even before and set to 0 in nr_compute_tbs
int
nb_re_dmrs
=
((
dlsch_config_pdu_1_0
->
dmrsConfigType
==
NFAPI_NR_DMRS_TYPE1
)
?
6
:
4
)
*
dlsch_config_pdu_1_0
->
n_dmrs_cdm_groups
;
int
nb_re_dmrs
=
((
dlsch_config_pdu_1_0
->
dmrsConfigType
==
NFAPI_NR_DMRS_TYPE1
)
?
6
:
4
)
*
dlsch_config_pdu_1_0
->
n_dmrs_cdm_groups
;
dlsch_config_pdu_1_0
->
TBS
=
nr_compute_tbs
(
dlsch_config_pdu_1_0
->
qamModOrder
,
if
(
R
>
0
)
R
,
dlsch_config_pdu_1_0
->
TBS
=
nr_compute_tbs
(
dlsch_config_pdu_1_0
->
qamModOrder
,
dlsch_config_pdu_1_0
->
number_rbs
,
R
,
dlsch_config_pdu_1_0
->
number_symbols
,
dlsch_config_pdu_1_0
->
number_rbs
,
nb_re_dmrs
*
get_num_dmrs
(
dlsch_config_pdu_1_0
->
dlDmrsSymbPos
),
dlsch_config_pdu_1_0
->
number_symbols
,
nb_rb_oh
,
0
,
1
);
nb_re_dmrs
*
get_num_dmrs
(
dlsch_config_pdu_1_0
->
dlDmrsSymbPos
),
nb_rb_oh
,
0
,
1
);
int
bw_tbslbrm
;
int
bw_tbslbrm
;
if
(
current_DL_BWP
->
initial_BWPSize
>
0
)
if
(
current_DL_BWP
->
initial_BWPSize
>
0
)
...
@@ -1104,7 +1105,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -1104,7 +1105,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1
->
qamModOrder
=
nr_get_Qm_dl
(
dlsch_config_pdu_1_1
->
mcs
,
dlsch_config_pdu_1_1
->
mcs_table
);
dlsch_config_pdu_1_1
->
qamModOrder
=
nr_get_Qm_dl
(
dlsch_config_pdu_1_1
->
mcs
,
dlsch_config_pdu_1_1
->
mcs_table
);
int
R
=
nr_get_code_rate_dl
(
dlsch_config_pdu_1_1
->
mcs
,
dlsch_config_pdu_1_1
->
mcs_table
);
int
R
=
nr_get_code_rate_dl
(
dlsch_config_pdu_1_1
->
mcs
,
dlsch_config_pdu_1_1
->
mcs_table
);
dlsch_config_pdu_1_1
->
targetCodeRate
=
R
;
dlsch_config_pdu_1_1
->
targetCodeRate
=
R
;
if
(
dlsch_config_pdu_1_1
->
targetCodeRate
==
0
||
dlsch_config_pdu_1_1
->
qamModOrder
==
0
)
{
if
(
dlsch_config_pdu_1_1
->
qamModOrder
==
0
)
{
LOG_W
(
MAC
,
"Invalid code rate or Mod order, likely due to unexpected DL DCI.
\n
"
);
LOG_W
(
MAC
,
"Invalid code rate or Mod order, likely due to unexpected DL DCI.
\n
"
);
return
-
1
;
return
-
1
;
}
}
...
@@ -1114,12 +1115,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
...
@@ -1114,12 +1115,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
}
}
int
nb_rb_oh
=
0
;
// it was not computed at UE side even before and set to 0 in nr_compute_tbs
int
nb_rb_oh
=
0
;
// it was not computed at UE side even before and set to 0 in nr_compute_tbs
int
nb_re_dmrs
=
((
dmrs_type
==
NULL
)
?
6
:
4
)
*
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
;
int
nb_re_dmrs
=
((
dmrs_type
==
NULL
)
?
6
:
4
)
*
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
;
dlsch_config_pdu_1_1
->
TBS
=
nr_compute_tbs
(
dlsch_config_pdu_1_1
->
qamModOrder
,
if
(
R
>
0
)
R
,
dlsch_config_pdu_1_1
->
TBS
=
nr_compute_tbs
(
dlsch_config_pdu_1_1
->
qamModOrder
,
dlsch_config_pdu_1_1
->
number_rbs
,
R
,
dlsch_config_pdu_1_1
->
number_symbols
,
dlsch_config_pdu_1_1
->
number_rbs
,
nb_re_dmrs
*
get_num_dmrs
(
dlsch_config_pdu_1_1
->
dlDmrsSymbPos
),
dlsch_config_pdu_1_1
->
number_symbols
,
nb_rb_oh
,
0
,
Nl
);
nb_re_dmrs
*
get_num_dmrs
(
dlsch_config_pdu_1_1
->
dlDmrsSymbPos
),
nb_rb_oh
,
0
,
Nl
);
// TBS_LBRM according to section 5.4.2.1 of 38.212
// TBS_LBRM according to section 5.4.2.1 of 38.212
long
*
maxMIMO_Layers
=
current_DL_BWP
->
pdsch_servingcellconfig
->
ext1
->
maxMIMO_Layers
;
long
*
maxMIMO_Layers
=
current_DL_BWP
->
pdsch_servingcellconfig
->
ext1
->
maxMIMO_Layers
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment