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OpenXG-RAN
Commit ef819e05 authored by Wang Tsu-Han's avatar Wang Tsu-Han
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Merge branch 'develop-nr' into nr-timing-measurement

parents bc4b6cf2 339a4daa
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ci-scripts/main.py
View file @ ef819e05
This diff is collapsed.
cmake_targets/CMakeLists.txt
View file @ ef819e05
......@@ -1302,7 +1302,7 @@ set(PHY_SRC_UE
${PHY_POLARSRC}
${PHY_SMALLBLOCKSRC}
${PHY_LDPCSRC}
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/pucch_rx.c # added by prasanth
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/pucch_rx.c
)
set(PHY_NR_UE_SRC
......
cmake_targets/autotests/test_case_list.xml
View file @ ef819e05
......@@ -1160,6 +1160,29 @@
<nruns>3</nruns>
</testCase>
<testCase id="015109">
<class>execution</class>
<desc>nr_nr_pucchsim Test cases. (Test1: Format 0 ACK miss 106 PRB),
(Test2: Format 1 ACK miss 106 PRB),
(Test3: Format 1 ACK miss 273 PRB),
(Test4: Format 1 NACKtoACK 106 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_pucchsim.Rel15</main_exec>
<main_exec_args>-R 106 -i 1 -P 0 -b 1 -s3 -n100
-R 106 -i 14 -P 1 -b 1 -s-6 -n 100
-R 273 -i 14 -P 1 -b 1 -s-6 -n100
-R 106 -i 14 -P 1 -b 1 -s-6 -T 0.001 -n1000</main_exec_args>
<tags>nr_pucchsim.test1 nr_pucchsim.test2 nr_pucchsim.test3 nr_pucchsim.test4</tags>
<search_expr_true>PUCCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110">
<class>execution</class>
<desc>dlsim_tm4 test cases (Test 1: 10 MHz, R2.FDD (MCS 5), EVA5, -1dB),
......
executables/nr-ru.c
View file @ ef819e05
......@@ -1076,10 +1076,18 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
cfg->rx_bw = 40e6;
}
} else if(N_RB == 106) {
cfg->sample_rate=61.44e6;
cfg->samples_per_frame = 614400;
cfg->tx_bw = 20e6;
cfg->rx_bw = 20e6;
if (fp->threequarter_fs) {
cfg->sample_rate=46.08e6;
cfg->samples_per_frame = 460800;
cfg->tx_bw = 20e6;
cfg->rx_bw = 20e6;
}
else {
cfg->sample_rate=61.44e6;
cfg->samples_per_frame = 614400;
cfg->tx_bw = 20e6;
cfg->rx_bw = 20e6;
}
} else {
AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu);
}
......@@ -1208,16 +1216,17 @@ static void *ru_thread_tx( void *param ) {
int i = 0;
int ret;
if(ru->if_south == LOCAL_RF)
{
uhd_set_thread_prio();
LOG_I(PHY,"set ru_thread_tx uhd priority");
}
wait_on_condition(&proc->mutex_FH1,&proc->cond_FH1,&proc->instance_cnt_FH1,"ru_thread_tx");
printf( "ru_thread_tx ready\n");
if(ru->rfdevice.uhd_set_thread_priority != NULL)
{
LOG_I(PHY,"set ru_thread_tx uhd priority \n");
ru->rfdevice.uhd_set_thread_priority();
}
while (!oai_exit) {
if (oai_exit) break;
......
executables/nr-ue.c
View file @ ef819e05
......@@ -350,39 +350,42 @@ static void UE_synch(void *arg) {
}
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response;
// Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
// call L2 for DL_CONFIG (DCI)
UE->dcireq.module_id = UE->Mod_id;
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
UE_mac->scheduled_response.ul_config = NULL;
UE_mac->scheduled_response.tx_request = NULL;
UE_mac->scheduled_response.module_id = UE->Mod_id;
UE_mac->scheduled_response.CC_id = 0;
UE_mac->scheduled_response.frame = proc->frame_rx;
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
//TODO: all of this has to be moved to the MAC!!!
dcireq.module_id = UE->Mod_id;
dcireq.gNB_index = 0;
dcireq.cc_id = 0;
dcireq.frame = proc->frame_rx;
dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
scheduled_response.dl_config = &dcireq.dl_config_req;
scheduled_response.ul_config = NULL;
scheduled_response.tx_request = NULL;
scheduled_response.module_id = UE->Mod_id;
scheduled_response.CC_id = 0;
scheduled_response.frame = proc->frame_rx;
scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&scheduled_response);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode, UE_mac->phy_config.config_req.pbch_config);
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n");
#endif
}
// no UL for now
/*
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
......@@ -395,6 +398,7 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
*/
}
/*!
......@@ -627,8 +631,9 @@ void *UE_thread(void *arg) {
processingData_t *curMsg=(processingData_t *)NotifiedFifoData(msgToPush);
curMsg->UE=UE;
// update thread index for received subframe
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = 0;
curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=table_sf_slot[slot_nr];
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
......
executables/nr-uesoftmodem.c
View file @ ef819e05
......@@ -542,8 +542,27 @@ void init_openair0(void) {
for (card=0; card<MAX_CARDS; card++) {
openair0_cfg[card].configFilename = NULL;
openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs;
if(frame_parms[0]->N_RB_DL == 106) {
if(frame_parms[0]->N_RB_DL == 217) {
if (numerology==1) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=92.16e6;
openair0_cfg[card].samples_per_frame = 921600;
openair0_cfg[card].tx_bw = 40e6;
openair0_cfg[card].rx_bw = 40e6;
}
else {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 1228800;
openair0_cfg[card].tx_bw = 40e6;
openair0_cfg[card].rx_bw = 40e6;
}
} else {
LOG_E(PHY,"Unsupported numerology!\n");
exit(-1);
}
}else if(frame_parms[0]->N_RB_DL == 106) {
if (numerology==0) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=23.04e6;
......@@ -556,14 +575,22 @@ void init_openair0(void) {
openair0_cfg[card].tx_bw = 10e6;
openair0_cfg[card].rx_bw = 10e6;
}
} else if (numerology==1) {
openair0_cfg[card].sample_rate=61.44e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 20e6;
openair0_cfg[card].rx_bw = 20e6;
} else if (numerology==1) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=46.08e6;
openair0_cfg[card].samples_per_frame = 480800;
openair0_cfg[card].tx_bw = 20e6;
openair0_cfg[card].rx_bw = 20e6;
}
else {
openair0_cfg[card].sample_rate=61.44e6;
openair0_cfg[card].samples_per_frame = 614400;
openair0_cfg[card].tx_bw = 20e6;
openair0_cfg[card].rx_bw = 20e6;
}
} else if (numerology==2) {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].samples_per_frame = 1228800;
openair0_cfg[card].tx_bw = 40e6;
openair0_cfg[card].rx_bw = 40e6;
} else {
......@@ -586,6 +613,10 @@ void init_openair0(void) {
openair0_cfg[card].tx_bw = 1.5e6;
openair0_cfg[card].rx_bw = 1.5e6;
}
else {
LOG_E(PHY,"Unknown NB_RB %d!\n",frame_parms[0]->N_RB_DL);
exit(-1);
}
if (frame_parms[0]->frame_type==TDD)
openair0_cfg[card].duplex_mode = duplex_mode_TDD;
......@@ -698,6 +729,7 @@ int main( int argc, char **argv ) {
frame_parms[CC_id]->nb_antennas_tx = nb_antenna_tx;
frame_parms[CC_id]->nb_antennas_rx = nb_antenna_rx;
frame_parms[CC_id]->nb_antenna_ports_eNB = 1; //initial value overwritten by initial sync later
frame_parms[CC_id]->threequarter_fs = threequarter_fs;
LOG_I(PHY,"Set nb_rx_antenna %d , nb_tx_antenna %d \n",frame_parms[CC_id]->nb_antennas_rx, frame_parms[CC_id]->nb_antennas_tx);
get_band(downlink_frequency[CC_id][0], &frame_parms[CC_id]->eutra_band, &uplink_frequency_offset[CC_id][0], &frame_parms[CC_id]->frame_type);
}
......
maketags
View file @ ef819e05
#!/bin/sh
echo "building ctags for openair1 and openair2 ..."
ctags -e -R --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair1/SIMULATION/ --exclude=targets/DOCS/ --exclude=targets/PROJECTS/ openair1 openair2 openair3 targets cmake_targets common nfapi
ctags -e -R --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair1/SIMULATION/ --exclude=targets/DOCS/ --exclude=targets/PROJECTS/ openair1 openair2 openair3 targets cmake_targets common nfapi executables
openair1/PHY/MODULATION/slot_fep_nr.c
View file @ ef819e05
......@@ -89,6 +89,10 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
dft = dft2048;
break;
case 3072:
dft = dft3072;
break;
case 4096:
dft = dft4096;
break;
......@@ -98,8 +102,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
break;
default:
dft = dft512;
break;
printf("unsupported ofdm symbol size \n");
assert(0);
}
if (no_prefix) {
......
openair1/PHY/NR_TRANSPORT/pucch_rx.c
View file @ ef819e05
This diff is collapsed.
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @ ef819e05
......@@ -237,9 +237,9 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t Tbslbrm = 950984;
uint16_t nb_rb = 30;
double Coderate = 0.0;
nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
//nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
//uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = 6; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint32_t i,j;
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ ef819e05
......@@ -103,8 +103,9 @@ uint16_t nr_pbch_extract(int **rxdataF,
j++;
}
rx_offset=(rx_offset+1)&(frame_parms->ofdm_symbol_size-1);
}
//rx_offset=(rx_offset+1)&(frame_parms->ofdm_symbol_size-1);
rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 1) : (rx_offset+1);
}
rxF_ext+=9;
} else { //symbol 2
......@@ -125,11 +126,12 @@ uint16_t nr_pbch_extract(int **rxdataF,
j++;
}
rx_offset=(rx_offset+1)&(frame_parms->ofdm_symbol_size-1);
//rx_offset=(rx_offset+1)&(frame_parms->ofdm_symbol_size-1);
rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 1) : (rx_offset+1);
}
rxF_ext+=9;
} else rx_offset = (rx_offset+12)&(frame_parms->ofdm_symbol_size-1);
} else rx_offset = (rx_offset >= frame_parms->ofdm_symbol_size) ? (rx_offset - frame_parms->ofdm_symbol_size + 12) : (rx_offset+12);//rx_offset = (rx_offset+12)&(frame_parms->ofdm_symbol_size-1);
}
}
......@@ -566,8 +568,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
}
uint32_t payload = 0;
uint8_t xtra_byte = 0;
xtra_byte = (out>>24)&0xff;
//uint8_t xtra_byte = 0;
nr_ue_pbch_vars->xtra_byte = (out>>24)&0xff;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
payload |= ((out>>i)&1)<<(NR_POLAR_PBCH_PAYLOAD_BITS-i-1);
......@@ -575,18 +577,18 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
for (int i=0; i<3; i++)
decoded_output[i] = (uint8_t)((payload>>((3-i)<<3))&0xff);
n_hf = ((xtra_byte>>4)&0x01); // computing the half frame index from the extra byte
n_hf = ((nr_ue_pbch_vars->xtra_byte>>4)&0x01); // computing the half frame index from the extra byte
ssb_index = i_ssb; // ssb index corresponds to i_ssb for Lmax = 4,8
if (Lmax == 64) { // for Lmax = 64 ssb index 4th,5th and 6th bits are in extra byte
for (int i=0; i<3; i++)
ssb_index += (((xtra_byte>>(7-i))&0x01)<<(3+i));
ssb_index += (((nr_ue_pbch_vars->xtra_byte>>(7-i))&0x01)<<(3+i));
}
ue->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index, n_hf);
#ifdef DEBUG_PBCH
printf("xtra_byte %x payload %x\n", xtra_byte, payload);
printf("xtra_byte %x payload %x\n", nr_ue_pbch_vars->xtra_byte, payload);
for (int i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++) {
// printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
......@@ -594,19 +596,25 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
}
#endif
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
ue->dl_indication.proc=proc;
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0];
ue->rx_ind.rx_indication_body[0].mib_pdu.additional_bits = xtra_byte;
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL
ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->rx_ind.number_pdus = 1;
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL;
dl_indication.proc=proc; // needed to signal back the frame number -> FIXME
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
rx_ind.rx_indication_body[0].mib_pdu.additional_bits = nr_ue_pbch_vars->xtra_byte;
rx_ind.rx_indication_body[0].mib_pdu.ssb_index = i_ssb; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
rx_ind.number_pdus = 1;
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&ue->dl_indication);
ue->if_inst->dl_indication(&dl_indication);
return 0;
}
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @ ef819e05
......@@ -50,15 +50,12 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
unsigned char harq_pid){
int N_PRB_oh, N_RE_prime, cwd_idx, length_dmrs, Nid_cell;
int nb_rb, Nsymb_pusch, first_rb, nb_codewords;
int nb_rb, Nsymb_pusch, first_rb, nb_codewords,mcs,rvidx;
uint16_t n_rnti;
fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue;
ul_dci_pdu = &UE->dci_ind.dci_list[0].dci;
//--------------------------Temporary configuration-----------------------------//
length_dmrs = 1;
n_rnti = 0x1234;
......@@ -66,7 +63,9 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
nb_rb = 50;
first_rb = 30;
Nsymb_pusch = 12;
nb_codewords = (ul_dci_pdu->precod_nbr_layers>4)?2:1;
nb_codewords = 1;
mcs = 9;
rvidx = 0;
//------------------------------------------------------------------------------//
for (cwd_idx = 0; cwd_idx < nb_codewords; cwd_idx++) {
......@@ -87,19 +86,19 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
if (harq_process_ul_ue) {
harq_process_ul_ue->mcs = ul_dci_pdu->mcs;
harq_process_ul_ue->Nl = ul_dci_pdu->precod_nbr_layers;
harq_process_ul_ue->mcs = mcs;
harq_process_ul_ue->Nl = nb_codewords;
harq_process_ul_ue->nb_rb = nb_rb;
harq_process_ul_ue->first_rb = first_rb;
harq_process_ul_ue->number_of_symbols = Nsymb_pusch;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb*nb_codewords;
harq_process_ul_ue->rvidx = ul_dci_pdu->rv;
harq_process_ul_ue->TBS = nr_compute_tbs(ul_dci_pdu->mcs,
harq_process_ul_ue->rvidx = rvidx;
harq_process_ul_ue->TBS = nr_compute_tbs(harq_process_ul_ue->mcs,
nb_rb,
Nsymb_pusch,
ulsch_ue->nb_re_dmrs,
length_dmrs,
ul_dci_pdu->precod_nbr_layers);
harq_process_ul_ue->Nl);
}
......
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
View file @ ef819e05
......@@ -89,6 +89,10 @@ void *get_idft(int ofdm_symbol_size)
idft = idft2048;
break;
case 3072:
idft = idft3072;
break;
case 4096:
idft = idft4096;
break;
......
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
View file @ ef819e05
This diff is collapsed.
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h
View file @ ef819e05
......@@ -42,10 +42,25 @@
#include "T.h"
#define ONE_OVER_SQRT2 23170 // 32767/sqrt(2) = 23170 (ONE_OVER_SQRT2)
void nr_decode_pucch1( int32_t **rxdataF,
pucch_GroupHopping_t pucch_GroupHopping,
uint32_t n_id, // hoppingID higher layer parameter
uint64_t *payload,
NR_DL_FRAME_PARMS *frame_parms,
int16_t amp,
int nr_tti_tx,
uint8_t m0,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
void nr_decode_pucch0( int32_t **rxdataF,
pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id, //PHY_VARS_gNB *gNB, generally rxdataf is in gNB->common_vars
uint8_t *payload,
uint64_t *payload,
NR_DL_FRAME_PARMS *frame_parms,
int16_t amp,
int nr_tti_tx,
......@@ -74,7 +89,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int16_t amp,
int nr_tti_tx,
uint8_t m0,
uint8_t mcs,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB);
......
openair1/PHY/defs_nr_UE.h
View file @ ef819e05
......@@ -822,6 +822,8 @@ typedef struct {
/// \brief Pointer to PBCH decoded output.
/// - first index: ? [0..63] (hard coded)
uint8_t *decoded_output;
/// \brief PBCH additional bits
uint8_t xtra_byte;
/// \brief Total number of PDU errors.
uint32_t pdu_errors;
/// \brief Total number of PDU errors 128 frames ago.
......@@ -923,18 +925,22 @@ typedef struct {
NR_UE_COMMON common_vars;
nr_ue_if_module_t *if_inst;
nfapi_nr_config_request_t nrUE_config;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
//nfapi_nr_config_request_t nrUE_config; <-- don't use config type for gNB!!!
fapi_nr_config_request_t nrUE_config;
// the following structures are not part of PHY_vars_UE anymore as it is not thread safe. They are now on the stack of the functions that actually need them
//nr_downlink_indication_t dl_indication;
//nr_uplink_indication_t ul_indication;
/// UE FAPI DCI request
nr_dcireq_t dcireq;
//nr_dcireq_t dcireq;
// pointers to the next 2 strcutres are also included in dl_indictation
/// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind;
//fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception
fapi_nr_dci_indication_t dci_ind;
//fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[40];
......
openair1/SCHED_NR_UE/defs.h
View file @ ef819e05
......@@ -123,7 +123,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode,fapi_nr_pbch_config_t pbch_config);
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
......
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ ef819e05
......@@ -49,10 +49,10 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
int slot = scheduled_response->slot;
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
if(scheduled_response != NULL){
// Note: we have to handle the thread IDs for this. To be revisited completely.
uint8_t thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot];
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
......@@ -147,6 +147,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->harq_processes[current_harq_pid]->Nl = pusch_config_pdu->n_layers;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
......@@ -213,6 +214,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
fapi_nr_config_request_t nrUE_config = PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n");
......@@ -227,6 +230,8 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
LOG_I(MAC,"-------------------------------\n");
memcpy(&nrUE_config.pbch_config,&phy_config->config_req.pbch_config,sizeof(fapi_nr_pbch_config_t));
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ ef819e05
This diff is collapsed.
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ ef819e05
......@@ -685,6 +685,8 @@ int main(int argc, char **argv)
UE_mac->phy_config.config_req.pbch_config.ssb_index = 0;
UE_mac->phy_config.config_req.pbch_config.half_frame_bit = 0;
nr_ue_phy_config_request(&UE_mac->phy_config);
for (SNR=snr0; SNR<snr1; SNR+=.2) {
n_errors = 0;
......@@ -735,8 +737,7 @@ int main(int argc, char **argv)
&UE_proc,
0,
do_pdcch_flag,
normal_txrx,
UE_mac->phy_config.config_req.pbch_config);
normal_txrx);
if (n_trials==1) {
LOG_M("rxsigF0.m","rxsF0", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[0],slot_length_complex_samples_no_prefix,1,1);
......@@ -744,7 +745,7 @@ int main(int argc, char **argv)
LOG_M("rxsigF1.m","rxsF1", UE->common_vars.common_vars_rx_data_per_thread[0].rxdataF[1],slot_length_complex_samples_no_prefix,1,1);
}
if (UE->dci_ind.number_of_dcis==0) n_errors++;
if (UE_mac->dl_config_request.number_pdus==0) n_errors++;
}
} //noise trials
......
openair1/SIMULATION/NR_PHY/pbchsim.c
View file @ ef819e05
......@@ -637,10 +637,10 @@ int main(int argc, char **argv)
uint8_t gNB_xtra_byte=0;
for (int i=0; i<8; i++)
gNB_xtra_byte |= ((gNB->pbch.pbch_a>>(31-i))&1)<<(7-i);
payload_ret = (UE->rx_ind.rx_indication_body->mib_pdu.additional_bits == gNB_xtra_byte);
payload_ret = (UE->pbch_vars[0]->xtra_byte == gNB_xtra_byte);
for (i=0;i<3;i++){
payload_ret += (UE->rx_ind.rx_indication_body->mib_pdu.pdu[i] == gNB->pbch_pdu[2-i]);
payload_ret += (UE->pbch_vars[0]->decoded_output[i] == gNB->pbch_pdu[2-i]);
//printf("pdu byte %d gNB: 0x%02x UE: 0x%02x\n",i,gNB->pbch_pdu[i], UE->rx_ind.rx_indication_body->mib_pdu.pdu[i]);
}
//printf("xtra byte gNB: 0x%02x UE: 0x%02x\n",gNB_xtra_byte, UE->rx_ind.rx_indication_body->mib_pdu.additional_bits);
......@@ -656,7 +656,6 @@ int main(int argc, char **argv)
if (((float)n_errors/(float)n_trials <= target_error_rate) && (n_errors_payload==0)) {
printf("PBCH test OK\n");
printf("Synchronization obtained for i_ssb = %d\n",UE->rx_ind.rx_indication_body[0].mib_pdu.ssb_index);
break;
}
......
openair1/SIMULATION/NR_PHY/pucchsim.c
View file @ ef819e05
This diff is collapsed.
openair1/SIMULATION/NR_PHY/ulsim.c
View file @ ef819e05
......@@ -55,6 +55,7 @@
#include "PHY/TOOLS/tools_defs.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
#include "PHY/phy_vars.h"
#include "SCHED_NR_UE/fapi_nr_ue_l1.h"
//#include "PHY/MODULATION/modulation_common.h"
//#include "common/config/config_load_configmodule.h"
......@@ -170,6 +171,7 @@ int main(int argc, char **argv) {
int start_symbol = NR_SYMBOLS_PER_SLOT - nb_symb_sch;
uint16_t nb_rb = 50;
uint8_t Imcs = 9;
uint8_t precod_nbr_layers = 1;
int gNB_id = 0;
int ap;
int tx_offset;
......@@ -182,7 +184,6 @@ int main(int argc, char **argv) {
cpuf = get_cpu_freq_GHz();
fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
UE_nr_rxtx_proc_t UE_proc;
......@@ -444,11 +445,6 @@ int main(int argc, char **argv) {
}
}
ul_dci_pdu = &UE->dci_ind.dci_list[0].dci;
ul_dci_pdu->mcs = Imcs;
ul_dci_pdu->rv = 0;
ul_dci_pdu->precod_nbr_layers = 1;
unsigned char harq_pid = 0;
unsigned int TBS = 8424;
......@@ -459,14 +455,14 @@ int main(int argc, char **argv) {
mod_order = nr_get_Qm(Imcs, 1);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, ul_dci_pdu->precod_nbr_layers);
TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, precod_nbr_layers);
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id+1][0];
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &ulsch_gNB->harq_processes[harq_pid]->ulsch_pdu;
NR_UE_ULSCH_t **ulsch_ue = UE->ulsch[0][0];
// --------- setting rel15_ul parameters ----------
// --------- setting rel15_ul parameters for gNB --------
rel15_ul->rnti = n_rnti;
rel15_ul->ulsch_pdu_rel15.start_rb = start_rb;
rel15_ul->ulsch_pdu_rel15.number_rbs = nb_rb;
......@@ -477,9 +473,41 @@ int main(int argc, char **argv) {
rel15_ul->ulsch_pdu_rel15.Qm = mod_order;
rel15_ul->ulsch_pdu_rel15.mcs = Imcs;
rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = ul_dci_pdu->precod_nbr_layers;
rel15_ul->ulsch_pdu_rel15.ndi = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = precod_nbr_layers;
///////////////////////////////////////////////////
nr_scheduled_response_t scheduled_response;
fapi_nr_ul_config_request_t ul_config;
//fapi_nr_tx_request_t tx_request;
scheduled_response.module_id = 0;
scheduled_response.CC_id = 0;
scheduled_response.frame = frame;
scheduled_response.slot = slot;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.dl_config = NULL;
ul_config.sfn_slot = slot;
ul_config.number_pdus = 1;
ul_config.ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config.ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = nb_rb;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = start_rb;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = nb_symb_sch;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = start_symbol;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.mcs = Imcs;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = 0;
ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
//there are plenty of other parameters that we don't seem to be using for now. e.g.
//ul_config.ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.absolute_delta_PUSCH = 0;
// set FAPI parameters for UE, put them in the scheduled response and call
//nr_ue_scheduled_response(&scheduled_response);
unsigned char *estimated_output_bit;
unsigned char *test_input_bit;
unsigned int errors_bit = 0;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ ef819e05
......@@ -583,6 +583,9 @@ int8_t nr_ue_decode_mib(
mac->type0_pdcch_ss_n_c = n_c;
// fill in the elements in config request inside P5 message
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_id;
mac->phy_config.config_req.pbch_config.system_frame_number = frame; // after calculation
mac->phy_config.config_req.pbch_config.subcarrier_spacing_common = mac->mib->subCarrierSpacingCommon;
mac->phy_config.config_req.pbch_config.ssb_subcarrier_offset = ssb_subcarrier_offset; // after calculation
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ ef819e05
......@@ -72,14 +72,15 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
// return 0;
return 0;
/*
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
dci_ind,
pduP,
pdu_len);
*/
}
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
......@@ -156,6 +157,9 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
......@@ -242,9 +246,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
dl_info->rx_ind = NULL;
dl_info->dci_ind = NULL;
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
return 0;
}
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
View file @ ef819e05
......@@ -65,6 +65,7 @@ typedef struct {
frame_t frame;
/// slot
int slot;
/// proc is needed to signal back decoded frame number to PHY. However, this is not really FAPI procedure and should be done differently
UE_nr_rxtx_proc_t * proc;
/// NR UE FAPI-like P7 message, direction: L1 to L2
......
targets/ARCH/BLADERF/USERSPACE/LIB/bladerf_lib.c
View file @ ef819e05
......@@ -1124,6 +1124,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->trx_set_gains_func = trx_brf_set_gains;
device->openair0_cfg = openair0_cfg;
device->priv = (void *)brf;
device->uhd_set_thread_priority = NULL;
calibrate_rf(device);
......
targets/ARCH/COMMON/common_lib.c
View file @ ef819e05
......@@ -109,7 +109,6 @@ int load_lib(openair0_device *device, openair0_config_t *openair0_cfg, eth_param
else
libname=OAI_RF_LIBNAME;
shlib_fdesc[0].fname="device_init";
//shlib_fdesc[1].fname="uhd_set_thread_priority";
} else {
libname=OAI_TP_LIBNAME;
shlib_fdesc[0].fname="transport_init";
......@@ -119,32 +118,12 @@ int load_lib(openair0_device *device, openair0_config_t *openair0_cfg, eth_param
LOG_E(HW,"Library %s couldn't be loaded\n",libname);
} else {
ret=((devfunc_t)shlib_fdesc[0].fptr)(device,openair0_cfg,cfg);
//uhd_set_thread_priority_fun = (set_prio_func_t)shlib_fdesc[1].fptr;
}
return ret;
}
void uhd_set_thread_prio(void) {
loader_shlibfunc_t shlib_fdesc[1];
int ret = 0;
char *libname;
if (getenv("RFSIMULATOR") != NULL)
libname="rfsimulator";
else
libname=OAI_RF_LIBNAME;
shlib_fdesc[0].fname="uhd_set_thread_priority";
ret=load_module_shlib(libname,shlib_fdesc,1,NULL);
if (ret < 0) {
LOG_E(HW,"Library %s couldn't be loaded\n",libname);
} else {
(set_prio_func_t)shlib_fdesc[0].fptr();
}
return ret;
}
int openair0_device_load(openair0_device *device, openair0_config_t *openair0_cfg) {
......
targets/ARCH/COMMON/common_lib.h
View file @ ef819e05
......@@ -387,6 +387,10 @@ struct openair0_device_t {
* \param arg pointer to capabilities or configuration
*/
void (*configure_rru)(int idx, void *arg);
/*! \brief set UHD thread priority
*/
void (*uhd_set_thread_priority)(void);
};
/* type of device init function, implemented in shared lib */
......@@ -445,9 +449,7 @@ int openair0_set_rx_frequencies(openair0_device *device, openair0_config_t *open
#define gettid() syscall(__NR_gettid)
/*@}*/
void uhd_set_thread_prio(void);
typedef void(*set_prio_func_t)(void);
set_prio_func_t uhd_set_thread_priority_fun;
#ifdef __cplusplus
}
......
targets/ARCH/ETHERNET/USERSPACE/LIB/ethernet_lib.c
View file @ ef819e05
......@@ -401,6 +401,7 @@ int transport_init(openair0_device *device, openair0_config_t *openair0_cfg, eth
device->trx_stop_func = trx_eth_stop;
device->trx_set_freq_func = trx_eth_set_freq;
device->trx_set_gains_func = trx_eth_set_gains;
device->uhd_set_thread_priority = NULL;
if (eth->flags == ETH_RAW_MODE) {
device->trx_write_func = trx_eth_write_raw;
......
targets/ARCH/EXMIMO/USERSPACE/LIB/openair0_lib.c
View file @ ef819e05
......@@ -772,6 +772,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->trx_set_gains_func = trx_exmimo_set_gains;
device->openair0_cfg = openair0_cfg;
device->priv = (void *)exm;
device->uhd_set_thread_priority = NULL;
printf("EXMIMO2: Getting addresses for memory-mapped DMA\n");
......
targets/ARCH/LMSSDR/USERSPACE/LIB/lms_lib.cpp
View file @ ef819e05
......@@ -405,6 +405,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg){
device->trx_stop_func = trx_lms_stop;
device->trx_set_freq_func = trx_lms_set_freq;
device->trx_set_gains_func = trx_lms_set_gains;
device->uhd_set_thread_priority = NULL;
device->openair0_cfg = openair0_cfg;
......
targets/ARCH/LMSSDR/USERSPACE/LIB/sodera_lib.cpp
View file @ ef819e05
......@@ -706,6 +706,7 @@ int openair0_dev_init_sodera(openair0_device* device, openair0_config_t *openair
device->trx_stop_func = trx_sodera_stop;
device->trx_set_freq_func = trx_sodera_set_freq;
device->trx_set_gains_func = trx_sodera_set_gains;
device->uhd_set_thread_priority = NULL;
s->sample_rate = openair0_cfg[0].sample_rate;
s->channelscount = openair0_cfg[0].rx_num_channels;
......
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @ ef819e05
......@@ -591,7 +591,15 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
for (int j=0; j<nsamps2; j++) {
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
// FK: in some cases the buffer might not be 32 byte aligned, so we cannot use avx2
if ((((uintptr_t) buff[i])&0x1F)==0) {
((__m256i *)buff[i])[j] = _mm256_srai_epi16(buff_tmp[i][j],4);
}
else {
((__m128i *)buff[i])[2*j] = _mm_srai_epi16(((__m128i*)buff_tmp[i])[j],4);
((__m128i *)buff[i])[2*j+1] = _mm_srai_epi16(((__m128i*)buff_tmp[i])[2*j+1],4);
}
#else
((__m128i *)buff[i])[j] = _mm_srai_epi16(buff_tmp[i][j],4);
#endif
......@@ -845,6 +853,10 @@ void set_rx_gain_offset(openair0_config_t *openair0_cfg, int chain_index,int bw_
if (bw_gain_adjust==1) {
switch ((int)openair0_cfg[0].sample_rate) {
case 46080000:
break;
case 30720000:
break;
......@@ -870,7 +882,7 @@ void set_rx_gain_offset(openair0_config_t *openair0_cfg, int chain_index,int bw_
default:
LOG_E(PHY,"unknown sampling rate %d\n",(int)openair0_cfg[0].sample_rate);
exit(-1);
//exit(-1);
break;
}
}
......@@ -907,6 +919,12 @@ int trx_usrp_reset_stats(openair0_device *device) {
return(0);
}
/*! \brief Set uhd priority
*/
static void uhd_set_thread_priority(void) {
uhd::set_thread_priority_safe(1.0);
}
#if defined(USRP_REC_PLAY)
extern "C" {
/*! \brief Initializer for USRP record/playback config
......@@ -1044,6 +1062,7 @@ extern "C" {
device->trx_set_freq_func = trx_usrp_set_freq;
device->trx_set_gains_func = trx_usrp_set_gains;
device->openair0_cfg = openair0_cfg;
device->uhd_set_thread_priority = uhd_set_thread_priority;
std::cerr << "USRP device initialized in subframes replay mode for " << u_sf_loops << " loops. Use mmap="
<< use_mmap << std::endl;
} else {
......@@ -1158,6 +1177,13 @@ extern "C" {
openair0_cfg[0].rx_bw = 40e6;
break;
case 46080000:
//openair0_cfg[0].samples_per_packet = 1024;
openair0_cfg[0].tx_sample_advance = 115;
openair0_cfg[0].tx_bw = 40e6;
openair0_cfg[0].rx_bw = 40e6;
break;
case 30720000:
// from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048;
......@@ -1210,7 +1236,15 @@ extern "C" {
}
switch ((int)openair0_cfg[0].sample_rate) {
case 30720000:
case 46080000:
s->usrp->set_master_clock_rate(46.08e6);
//openair0_cfg[0].samples_per_packet = 1024;
openair0_cfg[0].tx_sample_advance = 115;
openair0_cfg[0].tx_bw = 40e6;
openair0_cfg[0].rx_bw = 40e6;
break;
case 30720000:
s->usrp->set_master_clock_rate(30.72e6);
//openair0_cfg[0].samples_per_packet = 1024;
openair0_cfg[0].tx_sample_advance = 115;
......@@ -1361,6 +1395,7 @@ extern "C" {
device->trx_set_freq_func = trx_usrp_set_freq;
device->trx_set_gains_func = trx_usrp_set_gains;
device->openair0_cfg = openair0_cfg;
device->uhd_set_thread_priority = uhd_set_thread_priority;
s->sample_rate = openair0_cfg[0].sample_rate;
// TODO:
......@@ -1463,9 +1498,6 @@ extern "C" {
return 0;
}
void uhd_set_thread_priority(void) {
uhd::set_thread_priority_safe(1.0);
}
}
/*@}*/
targets/ARCH/mobipass/interface.c
View file @ ef819e05
......@@ -132,6 +132,7 @@ int transport_init(openair0_device *device, openair0_config_t *openair0_cfg,
device->trx_set_gains_func = mobipass_set_gains;
device->trx_write_func = mobipass_write;
device->trx_read_func = mobipass_read;
device->uhd_set_thread_priority = NULL;
device->priv = mobi;
......
targets/ARCH/rfsimulator/simulator.c
View file @ ef819e05
......@@ -47,8 +47,8 @@ pthread_mutex_t Sockmutex;
typedef struct buffer_s {
int conn_sock;
bool alreadyRead;
uint64_t lastReceivedTS;
openair0_timestamp lastReceivedTS;
openair0_timestamp lastWroteTS;
bool headerMode;
samplesBlockHeader_t th;
char *transferPtr;
......@@ -60,7 +60,7 @@ typedef struct buffer_s {
typedef struct {
int listen_sock, epollfd;
uint64_t nextTimestamp;
openair0_timestamp nextTimestamp;
uint64_t typeStamp;
char *ip;
int saveIQfile;
......@@ -105,7 +105,9 @@ void rxAddInput( struct complex16 *input_sig, struct complex16 *after_channel_si
// the parameter "-s" is declared as SNR, but the input power is not well defined
// −132.24 dBm is a LTE subcarrier noise, that was used in origin code (15KHz BW thermal noise)
const double rxGain= 132.24 - snr_dB;
const double noise_per_sample = sqrt(0.5*noise_figure_watt) * pow(10,rxGain/20);
// sqrt(4*noise_figure_watt) is the thermal noise factor (volts)
// fixme: the last constant is pure trial results to make decent noise
const double noise_per_sample = sqrt(4*noise_figure_watt) * pow(10,rxGain/20) *10;
// Fixme: we don't fill the offset length samples at begining ?
// anyway, in today code, channel_offset=0
const int dd = abs(channelDesc->channel_offset);
......@@ -133,11 +135,6 @@ void rxAddInput( struct complex16 *input_sig, struct complex16 *after_channel_si
}
out_ptr->r += round(rx_tmp.x*pathLossLinear + noise_per_sample*gaussdouble(0.0,1.0));
/*
printf("in: %d, out %d= %f*%f + %f*%f\n",
input_sig[((TS+i)*nbTx)%CirSize].r, out_ptr->r , rx_tmp.x,
pathLossLinear, noise_per_sample,gaussdouble(0.0,1.0));
*/
out_ptr->i += round(rx_tmp.y*pathLossLinear + noise_per_sample*gaussdouble(0.0,1.0));
out_ptr++;
}
......@@ -156,8 +153,8 @@ void allocCirBuf(rfsimulator_state_t *bridge, int sock) {
AssertFatal ( (ptr->circularBuf=(sample_t *) malloc(sampleToByte(CirSize,1))) != NULL, "");
ptr->circularBufEnd=((char *)ptr->circularBuf)+sampleToByte(CirSize,1);
ptr->conn_sock=sock;
ptr->alreadyRead=false;
ptr->lastReceivedTS=0;
ptr->lastWroteTS=0;
ptr->headerMode=true;
ptr->transferPtr=(char *)&ptr->th;
ptr->remainToTransfer=sizeof(samplesBlockHeader_t);
......@@ -322,21 +319,22 @@ sin_addr:
setblocking(sock, notBlocking);
allocCirBuf(t, sock);
t->buf[sock].alreadyRead=true; // UE will start blocking on read
return 0;
}
uint64_t lastW=-1;
int rfsimulator_write(openair0_device *device, openair0_timestamp timestamp, void **samplesVoid, int nsamps, int nbAnt, int flags) {
rfsimulator_state_t *t = device->priv;
LOG_D(HW,"sending %d samples at time: %ld\n", nsamps, timestamp);
for (int i=0; i<FD_SETSIZE; i++) {
buffer_t *ptr=&t->buf[i];
buffer_t *b=&t->buf[i];
if (ptr->conn_sock >= 0 ) {
if (b->conn_sock >= 0 ) {
if ( abs((double)b->lastWroteTS-timestamp) > (double)CirSize)
LOG_E(HW,"Tx/Rx shift too large Tx:%lu, Rx:%lu\n", b->lastWroteTS, b->lastReceivedTS);
samplesBlockHeader_t header= {t->typeStamp, nsamps, nbAnt, timestamp};
fullwrite(ptr->conn_sock,&header, sizeof(header), t);
fullwrite(b->conn_sock,&header, sizeof(header), t);
sample_t tmpSamples[nsamps][nbAnt];
for(int a=0; a<nbAnt; a++) {
......@@ -346,17 +344,17 @@ int rfsimulator_write(openair0_device *device, openair0_timestamp timestamp, voi
tmpSamples[s][a]=in[s];
}
if (ptr->conn_sock >= 0 )
fullwrite(ptr->conn_sock, (void *)tmpSamples, sampleToByte(nsamps,nbAnt), t);
if (b->conn_sock >= 0 ) {
fullwrite(b->conn_sock, (void *)tmpSamples, sampleToByte(nsamps,nbAnt), t);
b->lastWroteTS=timestamp+nsamps;
}
}
}
lastW=timestamp;
LOG_D(HW,"sent %d samples at time: %ld->%ld, energy in first antenna: %d\n",
nsamps, timestamp, timestamp+nsamps, signal_energy(samplesVoid[0], nsamps) );
// Let's verify we don't have incoming data
// This is mandatory when the opposite side don't transmit
// This is mandatory when the opposite side don't transmit
flushInput(t, 0);
pthread_mutex_unlock(&Sockmutex);
return nsamps;
......@@ -428,7 +426,6 @@ static bool flushInput(rfsimulator_state_t *t, int timeout) {
AssertFatal( (t->typeStamp == UE_MAGICDL_FDD && b->th.magic==ENB_MAGICDL_FDD) ||
(t->typeStamp == ENB_MAGICDL_FDD && b->th.magic==UE_MAGICDL_FDD), "Socket Error in protocol");
b->headerMode=false;
b->alreadyRead=true;
if ( b->lastReceivedTS != b->th.timestamp) {
int nbAnt= b->th.nbAnt;
......@@ -444,8 +441,8 @@ static bool flushInput(rfsimulator_state_t *t, int timeout) {
}
b->lastReceivedTS=b->th.timestamp;
AssertFatal(lastW == -1 || ( abs((double)lastW-b->lastReceivedTS) < (double)CirSize),
"Tx/Rx shift too large Tx:%lu, Rx:%lu\n", lastW, b->lastReceivedTS);
AssertFatal(b->lastWroteTS == 0 || ( abs((double)b->lastWroteTS-b->lastReceivedTS) < (double)CirSize),
"Tx/Rx shift too large Tx:%lu, Rx:%lu\n", b->lastWroteTS, b->lastReceivedTS);
b->transferPtr=(char *)&b->circularBuf[b->lastReceivedTS%CirSize];
b->remainToTransfer=sampleToByte(b->th.size, b->th.nbAnt);
}
......@@ -501,15 +498,33 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
return nsamps;
}
} else {
bool have_to_wait;
do {
have_to_wait=false;
for ( int sock=0; sock<FD_SETSIZE; sock++) {
if ( t->buf[sock].circularBuf && t->buf[sock].alreadyRead )
if ( t->buf[sock].lastReceivedTS == 0 ||
(t->nextTimestamp+nsamps) > t->buf[sock].lastReceivedTS ) {
buffer_t *b=&t->buf[sock];
if ( b->circularBuf) {
LOG_D(HW,"sock: %d, lastWroteTS: %lu, lastRecvTS: %lu, TS must be avail: %lu\n",
sock, b->lastWroteTS,
b->lastReceivedTS,
t->nextTimestamp+nsamps);
if ( b->lastReceivedTS > b->lastWroteTS ) {
// The caller momdem (NB, UE, ...) must send Tx in advance, so we fill TX if Rx is in advance
// This occurs for example when UE is in sync mode: it doesn't transmit
// with USRP, it seems ok: if "tx stream" is off, we may consider it actually cuts the Tx power
struct complex16 v={0};
void *samplesVoid[b->th.nbAnt];
for ( int i=0; i <b->th.nbAnt; i++)
samplesVoid[i]=(void*)&v;
rfsimulator_write(device, b->lastReceivedTS, samplesVoid, 1, b->th.nbAnt, 0);
}
}
if ( b->circularBuf )
if ( t->nextTimestamp+nsamps > b->lastReceivedTS ) {
have_to_wait=true;
break;
}
......@@ -532,7 +547,7 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
for (int sock=0; sock<FD_SETSIZE; sock++) {
buffer_t *ptr=&t->buf[sock];
if ( ptr->circularBuf && ptr->alreadyRead ) {
if ( ptr->circularBuf ) {
bool reGenerateChannel=false;
//fixme: when do we regenerate
......@@ -627,6 +642,7 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
device->trx_set_gains_func = rfsimulator_set_gains;
device->trx_write_func = rfsimulator_write;
device->trx_read_func = rfsimulator_read;
device->uhd_set_thread_priority = NULL;
/* let's pretend to be a b2x0 */
device->type = USRP_B200_DEV;
device->openair0_cfg=&openair0_cfg[0];
......
targets/ARCH/tcp_bridge/tcp_bridge.c
View file @ ef819e05
......@@ -267,6 +267,7 @@ int device_init(openair0_device* device, openair0_config_t *openair0_cfg)
device->trx_set_gains_func = tcp_bridge_set_gains;
device->trx_write_func = tcp_bridge_write;
device->trx_read_func = tcp_bridge_read;
device->uhd_set_thread_priority = NULL;
device->priv = tcp_bridge;
......
targets/ARCH/tcp_bridge/tcp_bridge_oai.c
View file @ ef819e05
......@@ -313,6 +313,7 @@ int device_init(openair0_device* device, openair0_config_t *openair0_cfg)
device->trx_set_freq_func = tcp_bridge_set_freq;
device->trx_set_gains_func = tcp_bridge_set_gains;
device->trx_write_func = tcp_bridge_write;
device->uhd_set_thread_priority = NULL;
if (tcp_bridge->is_enb) {
device->trx_read_func = tcp_bridge_read;
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpx300.conf
View file @ ef819e05
......@@ -262,7 +262,7 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_DISABLE";
}
......
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