Commit f5b74a1b authored by Raymond Knopp's avatar Raymond Knopp

added modified sample_app files to FHI driver

parent 1be22b4c
#include <stdio.h>
#include <string.h>
void make_args(char **argv, int *argc, char *string)
{
char tmp[1024]={0x0};
FILE *cmd=NULL;
int i=0;
char *p=NULL;
sprintf(tmp, "set - %s && for i in %c$@%c;\n do\n echo $i\ndone",string, '"', '"');
cmd=popen(tmp, "r");
while (fgets(tmp, sizeof(tmp), cmd)!=NULL)
{
p=strchr(tmp, '\n');
if (p!=NULL) *p=0x0;
argv[i] = malloc(strlen(tmp));
strcpy(argv[i++], tmp);
}
*argc=i;
}
This diff is collapsed.
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
#ifndef _XRAN_APP_COMMON_H_
#define _XRAN_APP_COMMON_H_
#include <stdio.h>
#include <unistd.h>
#include "xran_fh_o_du.h"
#include "xran_pkt_up.h"
#include <rte_common.h>
#include <rte_mbuf.h>
#define VERSIONX "oran_bronze_release_v1.1"
#define APP_O_DU 0
#define APP_O_RU 1
enum app_state
{
APP_RUNNING,
APP_STOPPED
};
enum nRChBwOptions
{
PHY_BW_5_0_MHZ = 5, PHY_BW_10_0_MHZ = 10, PHY_BW_15_0_MHZ = 15, PHY_BW_20_0_MHZ = 20, PHY_BW_25_0_MHZ = 25,
PHY_BW_30_0_MHZ = 30, PHY_BW_40_0_MHZ = 40, PHY_BW_50_0_MHZ = 50, PHY_BW_60_0_MHZ = 60, PHY_BW_70_0_MHZ = 70,
PHY_BW_80_0_MHZ = 80, PHY_BW_90_0_MHZ = 90, PHY_BW_100_0_MHZ = 100, PHY_BW_200_0_MHZ = 200, PHY_BW_400_0_MHZ = 400
};
#define N_SC_PER_PRB 12
#define N_SYM_PER_SLOT 14
#define MAX_ANT_CARRIER_SUPPORTED (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR)
#define MAX_ANT_CARRIER_SUPPORTED_CAT_B (XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR)
#define SUBFRAME_DURATION_US 1000
//#define SLOTNUM_PER_SUBFRAME 8
#define SUBFRAMES_PER_SYSTEMFRAME 10
#define IQ_PLAYBACK_BUFFER_BYTES (XRAN_NUM_OF_SLOT_IN_TDD_LOOP*N_SYM_PER_SLOT*XRAN_MAX_PRBS*N_SC_PER_PRB*4L)
/* PRACH data samples are 32 bits wide, 16bits for I and 16bits for Q. Each packet contains 839 samples for long sequence or 144*14 (max) for short sequence. The payload length is 3356 octets.*/
#define PRACH_PLAYBACK_BUFFER_BYTES (144*14*4L)
#ifdef _DEBUG
#define iAssert(p) if(!(p)){fprintf(stderr,\
"Assertion failed: %s, file %s, line %d, val %d\n",\
#p, __FILE__, __LINE__, p);exit(-1);}
#else /* _DEBUG */
#define iAssert(p)
#endif /* _DEBUG */
extern int iq_playback_buffer_size_dl;
extern int iq_playback_buffer_size_ul;
extern int iq_bfw_buffer_size_dl;
extern int iq_bfw_buffer_size_ul;
extern int iq_srs_buffer_size_ul;
extern uint8_t numCCPorts;
/* Number of antennas supported by front-end */
extern uint8_t num_eAxc;
/* Number of antennas supported by front-end */
extern int16_t *p_tx_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
extern int16_t *p_tx_prach_play_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_prach_play_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_prach_play_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
extern int16_t *p_tx_srs_play_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
extern int32_t tx_srs_play_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
extern int32_t tx_srs_play_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
/* Number of antennas supported by front-end */
extern int16_t *p_rx_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
extern int16_t *p_prach_log_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t prach_log_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t prach_log_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
extern int16_t *p_srs_log_buffer[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
extern int32_t srs_log_buffer_size[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
extern int32_t srs_log_buffer_position[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR];
extern int16_t *p_tx_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int16_t *p_rx_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
/* beamforming weights for UL (O-DU) */
extern int16_t *p_tx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
/* beamforming weights for UL (O-DU) */
extern int16_t *p_tx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t tx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
/* beamforming weights for UL (O-RU) */
extern int16_t *p_rx_dl_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_dl_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_dl_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
/* beamforming weights for UL (O-RU) */
extern int16_t *p_rx_ul_bfw_buffer[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_ul_bfw_buffer_size[MAX_ANT_CARRIER_SUPPORTED];
extern int32_t rx_ul_bfw_buffer_position[MAX_ANT_CARRIER_SUPPORTED];
void sys_save_buf_to_file_txt(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
void sys_save_buf_to_file(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
int sys_load_file_to_buff(char *filename, char *bufname, unsigned char *pBuffer, unsigned int size, unsigned int buffers_num);
uint32_t app_xran_get_scs(uint8_t nMu);
uint16_t app_xran_get_num_rbs(uint8_t ranTech, uint32_t nNumerology, uint32_t nBandwidth, uint32_t nAbsFrePointA);
uint32_t app_xran_cal_nrarfcn(uint32_t nCenterFreq);
int32_t app_xran_set_slot_type(uint32_t nPhyInstanceId, uint32_t nFrameDuplexType,
uint32_t nTddPeriod, struct xran_slot_config *psSlotConfig);
uint32_t app_xran_get_tti_interval(uint8_t nMu);
#endif /*_XRAN_APP_COMMON_H_*/
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/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
/**
* @brief
* @file
* @ingroup
* @author Intel Corporation
**/
#ifndef _SAMPLEAPP__CONFIG_H_
#define _SAMPLEAPP__CONFIG_H_
#include <stdint.h>
#include <rte_ether.h>
#include "xran_fh_o_du.h"
/** Run time configuration of application */
typedef struct _RuntimeConfig
{
uint8_t appMode; /**< Application mode: lls-CU or RU */
uint8_t xranTech; /**< Radio Access Technology (NR or LTE) */
uint8_t xranCat; /**< xran mode: NR Categoty A, NR Category B, LTE Cat A, LTE Cat B */
uint8_t numCC; /**< Number of CC per ports supported by RU */
uint8_t numAxc; /**< Number of Antenna Carriers per CC */
uint8_t numUlAxc; /**< Number of Antenna Carriers per CC for UL (Cat B) */
uint32_t antElmTRx; /**< Number of antenna elements for TX and RX */
uint32_t muMimoUEs; /**< Number of UEs (with 1 RX ant)/beams */
uint32_t DlLayersPerUe; /**< Number of DL layer per UE */
uint32_t UlLayersPerUe; /**< Number of UL layer per UE */
uint32_t ttiPeriod; /**< TTI period */
uint32_t testVect; /**< Test Signal to send */
struct rte_ether_addr o_du_addr[XRAN_VF_MAX]; /**< O-DU Ethernet Mac Address */
struct rte_ether_addr o_ru_addr[XRAN_VF_MAX]; /**< O-RU Ethernet Mac Address */
struct rte_ether_addr tmp_addr; /**< Temp Ethernet Mac Address */
uint32_t instance_id; /**< Instance ID of application */
uint32_t io_core; /**< Core used for IO */
uint64_t io_worker; /**< Mask for worker cores */
int32_t io_sleep; /**< enable sleep on PMD cores */
uint32_t system_core; /* house keeping core */
int iova_mode; /**< DPDK IOVA Mode */
uint32_t mtu; /**< maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be communicated in a single
xRAN network layer transaction. supported 1500 bytes and 9600 bytes (Jumbo Frame) */
int numSlots; /**< number of slots in IQ vector */
char ant_file[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file to use for test vector */
char prach_file[XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file to use for test vector */
char dl_bfw_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file with beamforming weights for DL streams */
char ul_bfw_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANTENNA_NR][512]; /**< file with beamforming weights for UL streams */
char ul_srs_file [XRAN_MAX_SECTOR_NR*XRAN_MAX_ANT_ARRAY_ELM_NR][512]; /**< file with SRS content for UL antenna elements */
/* prach config */
uint8_t enablePrach; /**< enable PRACH */
uint8_t prachOffset; /**< Sets the PRACH position in frequency / subcarrier position, n_PRBoffset^RA and is expressed as a physical resource block number.
Set by SIB2, prach-FreqOffset in E-UTRA. */
uint8_t prachConfigIndex;/**< TS36.211 - Table 5.7.1-2 : PRACH Configuration Index */
uint8_t iqswap; /**< do swap of IQ before send to ETH */
uint8_t nebyteorderswap; /**< do swap of byte order from host byte order to network byte order. ETH */
uint8_t compression; /**< enable use case with compression */
uint8_t CompHdrType; /**< dynamic or static compression header */
uint16_t totalBfWeights; /**< The total number of beamforming weights on RU */
uint8_t enableSrs; /**< enable SRS (valid for Cat B only) */
uint16_t srsSymMask; /**< SRS symbol mask [014] within S/U slot [0-13] def is 13 */
uint16_t maxFrameId; /**< max value of frame id */
uint16_t Tadv_cp_dl;
uint16_t T2a_min_cp_dl;
uint16_t T2a_max_cp_dl;
uint16_t T2a_min_cp_ul;
uint16_t T2a_max_cp_ul;
uint16_t T2a_min_up;
uint16_t T2a_max_up;
uint16_t Ta3_min;
uint16_t Ta3_max;
uint16_t T1a_min_cp_dl;
uint16_t T1a_max_cp_dl;
uint16_t T1a_min_cp_ul;
uint16_t T1a_max_cp_ul;
uint16_t T1a_min_up;
uint16_t T1a_max_up;
uint16_t Ta4_min;
uint16_t Ta4_max;
uint8_t enableCP; /**< enable C-plane */
uint8_t cp_vlan_tag; /**< C-plane vlan tag */
uint8_t up_vlan_tag; /**< U-plane vlan tag */
int32_t debugStop;
int32_t debugStopCount;
int32_t bbdevMode;
int32_t DynamicSectionEna;
int32_t GPS_Alpha;
int32_t GPS_Beta;
uint8_t mu_number; /**< Mu numner as per 3GPP */
uint32_t nDLAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */
uint32_t nULAbsFrePointA; /**< Abs Freq Point A of the Carrier Center Frequency for in KHz Value: 450000->52600000 */
uint32_t nDLBandwidth; /**< Carrier bandwidth for in MHz. Value: 5->400 */
uint32_t nULBandwidth; /**< Carrier bandwidth for in MHz. Value: 5->400 */
uint32_t nDLFftSize; /**< DL FFT size */
uint32_t nULFftSize; /**< UL FFT size */
uint8_t nFrameDuplexType;
uint8_t nTddPeriod;
struct xran_slot_config sSlotConfig[XRAN_MAX_TDD_PERIODICITY];
struct xran_prb_map PrbMapDl;
struct xran_prb_map PrbMapUl;
int32_t DU_Port_ID_bitwidth;
int32_t BandSector_ID_bitwidth;
int32_t CC_ID_bitwidth;
int32_t RU_Port_ID_bitwidth;
} RuntimeConfig;
/**
* Parse application configuration file.
*
* @param filename The name of the configuration file to be parsed.
* @param config The configuration structure to be filled with parsed data. */
int parseConfigFile(char *filename, RuntimeConfig *config);
#endif /* _SAMPLEAPP__CONFIG_H_ */
/******************************************************************************
*
* Copyright (c) 2020 Intel.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*******************************************************************************/
/**
* @brief
* @file
* @ingroup
* @author Intel Corporation
**/
#ifndef _SAMPLEAPP__DEBUG_H_
#define _SAMPLEAPP__DEBUG_H_
#include <stdio.h>
#include "config.h"
#define MAX_FILE_NAME_LEN (512)
#define MAX_PATH_NAME_LEN (1024)
#ifdef _DEBUG
#define log_dbg(fmt, ...) \
fprintf(stderr, \
"DEBUG: %s(%d): " fmt "\n", \
__FILE__, \
__LINE__, ##__VA_ARGS__)
#else
#define log_dbg(fmt, ...)
#endif
#if defined(_DEBUG) || defined(_VERBOSE)
#define log_wrn(fmt, ...) \
fprintf( \
stderr, \
"WARNING: %s(%d): " fmt "\n", \
__FILE__, \
__LINE__, ##__VA_ARGS__)
#else
#define log_dbg(fmt, ...)
#define log_wrn(fmt, ...)
#endif
#define log_err(fmt, ...) \
fprintf(stderr, \
"ERROR: %s(%d): " fmt "\n", \
__FILE__, \
__LINE__, ##__VA_ARGS__)
inline void ShowData(void* ptr, unsigned int size)
{
uint8_t *d = (uint8_t *)ptr;
unsigned int i;
for(i = 0; i < size; i++)
{
if ( !(i & 0xf) )
printf("\n");
printf("%02x ", d[i]);
}
printf("\n");
}
#endif /* _SAMPLEAPP__DEBUG_H_ */
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