- 26 Apr, 2021 1 commit
-
-
Thomas Schlichter authored
-
- 24 Apr, 2021 1 commit
-
-
Remi Hardy authored
MR !1129 : gnb-realtime-hotfix -Hotfix for realtime performance issue -Enabled L1 and scheduler timing statistics -Changed order of UL Indication. L1 Rx -> UL Ind -> L1 Tx MR !1123 : [CI] ci_phytest -new 5G NR phy test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106 MR !1128 : [CI] ci_add_runtime_stats -adding L1 processing stats MR !1132 : [CI] ci_add_uldlharq_stats -additonal ulsch/dlsch stat no MR : hotfix branch fixgtpu -revert default values for 5GS -fix T_IDs.h build
-
- 23 Apr, 2021 8 commits
-
-
Thomas Schlichter authored
-
Raghavendra Dinavahi authored
-
Remi Hardy authored
-
Raghavendra Dinavahi authored
- Procedure get_l_prime is modified - Single and double symbol DMRS are handled in Type A and Type B
-
Raghavendra Dinavahi authored
Segmentation fault observed in case the address for mod_dmrs[dmrssymbol] is not 16byte aligned.
-
Raghavendra Dinavahi authored
-
Raghavendra Dinavahi authored
LocationandBandwidth adjusted according to the location of SSB and Controlresourceset 0 For example for 106RBs configuration files - - AbsoluteFrequencySSB = 641032 = RB43 (1032/24) - points to Subcarrier 0 of RB10 of SSB block - Hence SSB is located from RB33-RB53 - Coresetzero sent in MIB is 0 which means offset 0, RBsize 24 from Start of SSB according to table 13.4 in Spec 38.213 - InitialBWP should start from RB 33 (offset is 0 from SSB) and should be a size of minimum 24 RBs. - SLIV = 275 * (24-1) + 33 = 6358 Controlresourceset value wrongly configured to 12 , changed to 0 as sent in MIB.
-
Raghavendra Dinavahi authored
Procedure fill_dmrs_mask is modified. - PDSCH Mapping Type B is supported - Modified according to sections 5.1.6.2 of Spec 38.214 - Single and double symbol DMRS are handled in Type A and Type B Mapping type according to the time domain allocation from DCI should be used to get the values of DMRS config For sending sib1 - DCI FORMAT 1_0 will be used with SI_RNTI, UE should perform these actions according to sections 5.1.6.2 of Spec 38.214 Additional DMRS set to pos2 in case of msg2 reception, msg3 transmission. Mapping type B is added to RRC reconfig. - nr_dlsim updated to test typeA and typeB. Verified the changes. - RFSIM Validation of PDSCH Mapping TypeB by changing timedomainallocation in configuration files.
-
- 22 Apr, 2021 3 commits
- 21 Apr, 2021 10 commits
-
-
hardy authored
-
Laurent THOMAS authored
-
Laurent THOMAS authored
-
Laurent THOMAS authored
-
Laurent THOMAS authored
-
Laurent THOMAS authored
-
hardy authored
-
hardy authored
-
hardy authored
-
hardy authored
-
- 20 Apr, 2021 1 commit
-
-
hardy authored
-
- 19 Apr, 2021 3 commits
-
-
hardy authored
-
Remi Hardy authored
-
Remi Hardy authored
Fix SA SIB1 segmentation fault
-
- 17 Apr, 2021 1 commit
-
-
hardy authored
-
- 16 Apr, 2021 12 commits
-
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
-
Sakthivel Velumani authored
quickfix for realtime problem caused by memset
-
Robert Schmidt authored
-
Robert Schmidt authored
-
Sakthivel Velumani authored
-