- 30 Mar, 2021 1 commit
-
-
riggy2013 authored
build on CentOS 8.3 will generate error: XDMA/linux-kernel/xdma/xdma_mod.c:301:2: error: implicit declaration of function ??pci_cleanup_aer_uncorrect_error_status?? [-Werror=implicit-function-declaration] pci_cleanup_aer_uncorrect_error_status(pdev); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: some warnings being treated as errors make[2]: *** [scripts/Makefile.build:316: /home/ndam/Downloads/dma_ip_drivers-master/XDMA/linux-kernel/xdma/xdma_mod.o] Error 1 The reason is, name change from pci_cleanup_aer_uncorrect_error_status() to pci_aer_clear_nonfatal_status() at https://github.com/torvalds/linux/commit/894020fdd88c1e9a74c60b67c0f19f1c7696ba2f CentOS and RedHat 8.3 accepted the patch.
-
- 16 Feb, 2021 1 commit
-
-
Sujatha Banoth authored
Updated the Support Link
-
- 03 Feb, 2021 1 commit
-
-
Sujatha Banoth authored
Added support for MM channel configuration, Keyhole feature support and addressed customer issues
-
- 02 Feb, 2021 2 commits
-
-
Sujatha Banoth authored
MM Channel configuration Keyhole feature support resolve the page allocation issues
-
Sujatha Banoth authored
QDMA DPDK 2020.2.1 Driver Release to support DPDK v20.11 Framework Changes
-
- 22 Dec, 2020 1 commit
-
-
Sujatha Banoth authored
2020.2 QDMA Linux Driver README File updated with proper simlink
-
- 21 Dec, 2020 3 commits
-
-
Sujatha Banoth authored
2020.2 QDMA Linux Driver Release
-
Sujatha Banoth authored
2020.2 QDMA DPDK Driver Release
-
Sujatha Banoth authored
2020.2 QDMA Windows Driver Release
-
- 31 Oct, 2020 2 commits
- 30 Oct, 2020 1 commit
-
-
Karen Xie authored
-
- 29 Oct, 2020 2 commits
-
-
Karen Xie authored
XDMA: dma_from/to_device: do NOT mark partial completion as failure. the bw is not calculated in the case of underflow (partial completion).
-
Karen Xie authored
XDMA: 1. split module parameter sgdma_timeout to h2c_timeout & c2h_timeout. 2. value of 0 means no timeout (i.e., wait forever).
-
- 27 Oct, 2020 3 commits
- 23 Oct, 2020 3 commits
-
-
Sujatha Banoth authored
2020.2 XVSEC Driver Release documentation updates pointing to https://xilinx.github.io/dma_ip_drivers/
-
-
Sujatha Banoth authored
2020.2 XVSEC Driver Release - Supports the MCAP functionality for US/US+ and Versal Devices
-
- 09 Oct, 2020 2 commits
- 07 Oct, 2020 4 commits
- 28 Sep, 2020 1 commit
-
-
Karen Xie authored
-
- 22 Sep, 2020 4 commits
-
-
Julien authored
Change the checks for kernel versions to include checks for RHEL versions in case they are present. Add HAS_MMIOWB, ACCESS_OK_2_ARGS, HAS_WAKE_UP, and HAS_WAKE_UP_ONE and use them
-
Sujatha Banoth authored
Updated the apps/include/qdma_nl.h
-
Sujatha Banoth authored
Updated the qdma_nl.h
-
Sujatha Banoth authored
Updated the license header for QDMA Linux Driver application include files
-
- 15 Sep, 2020 1 commit
-
-
Julien authored
Fix the setting of the next adjacent fields in descriptors. Following commit 5faf23ec the next_adj field of all descriptors is set according to the index of the descriptor rather than its address which causes issues when dma_alloc_coherent doesn't return an address which is page aligned (which happens). Moreover, in the case of a transfer which number of descriptors is bigger than a full page, the next_adj field is set to the maximum (63) for all descriptors untill the last page of descriptors where it starts decreasing. Last, even before this commit, the next_adj field inside a block of adjacent descriptors is not decreasing untill coming near page end, which is not compliant with what the documentation says : "Every descriptor in the descriptor list must accurately describe the descriptor or block ofdescriptors that follows. In a block of adjacent descriptors, the Nxt_adj value decrements from the first descriptor to the second to last descriptor which has a value of zero. Likewise, eachdescriptor in the block points to the next descriptor in the block, except for the last descriptor which might point to a new block or might terminate the list." This commit aligns the blocks of adjacent descriptors to XDMA_MAX_ADJ_BLOCK_SIZE and makes the next_adj field decrease inside each block untill the second to last descriptor in the block or in the full transfer. The size of the page being a multiple of the size of the block (4096 = sizeof(xdma_desc) * 128 = sizeof(xdma_desc) * 2 * XDMA_MAX_ADJ_BLOCK_SIZE
-
- 08 Sep, 2020 1 commit
-
-
Sujatha Banoth authored
Resolved HW errors observed with QDMA4.0 MM only design
-
- 01 Sep, 2020 2 commits
- 25 Aug, 2020 5 commits
-
-
Julien authored
If pci_read_config_byte of register PCI_INTERRUPT_PIN returns 0, it means that legacy interrupts are not supported so return an error instead of trying to request an interrupt with val = 0.
-
Julien authored
-
Julien authored
pci_cleanup_aer_uncorrect_error_status replaced by pci_aer_clear_nonfatal_status
-
Julien authored
To keep compatibility, 0 for MSI-x is replaced by 0 for Auto since Auto will try MSI-x first. Add 3 - MSI-x for MSI-x mode.
-
Julien authored
Currently err_engine and all following errors try to release the resource they failed to create.
-