Commit d4e030cc authored by Ejaz Ahmed's avatar Ejaz Ahmed

Added more parameters in psfch pdu

parent cb17a253
...@@ -292,6 +292,11 @@ typedef struct sl_nr_tx_config_psbch_pdu { ...@@ -292,6 +292,11 @@ typedef struct sl_nr_tx_config_psbch_pdu {
typedef struct sl_nr_tx_config_psfch_pdu { typedef struct sl_nr_tx_config_psfch_pdu {
// These fields map directly to the same fields in nfapi_nr_ul_config_pucch_pdu // These fields map directly to the same fields in nfapi_nr_ul_config_pucch_pdu
uint8_t freq_hop_flag;
uint8_t group_hop_flag;
uint8_t sequence_hop_flag;
uint16_t second_hop_prb;
uint8_t nr_of_symbols;
uint8_t start_symbol_index; uint8_t start_symbol_index;
uint8_t hopping_id; uint8_t hopping_id;
uint8_t prb; uint8_t prb;
......
...@@ -59,6 +59,5 @@ void nr_generate_psfch0(const PHY_VARS_NR_UE *ue, ...@@ -59,6 +59,5 @@ void nr_generate_psfch0(const PHY_VARS_NR_UE *ue,
pucch_pdu.prb_start = psfch_pdu->prb; pucch_pdu.prb_start = psfch_pdu->prb;
pucch_pdu.initial_cyclic_shift = psfch_pdu->initial_cyclic_shift; pucch_pdu.initial_cyclic_shift = psfch_pdu->initial_cyclic_shift;
pucch_pdu.mcs = psfch_pdu->mcs; pucch_pdu.mcs = psfch_pdu->mcs;
nr_generate_pucch0(ue,txdataF,frame_parms,amp,nr_slot_tx,&pucch_pdu); nr_generate_pucch0(ue,txdataF,frame_parms,amp,nr_slot_tx,&pucch_pdu);
} }
...@@ -111,6 +111,13 @@ void nr_generate_pucch0(const PHY_VARS_NR_UE *ue, ...@@ -111,6 +111,13 @@ void nr_generate_pucch0(const PHY_VARS_NR_UE *ue,
nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,1,nr_slot_tx,&u[1],&v[1]); // calculating u and v value nr_group_sequence_hopping(pucch_GroupHopping,pucch_pdu->hopping_id,1,nr_slot_tx,&u[1],&v[1]); // calculating u and v value
prb_offset[1] = pucch_pdu->second_hop_prb + pucch_pdu->bwp_start; prb_offset[1] = pucch_pdu->second_hop_prb + pucch_pdu->bwp_start;
} }
LOG_D(PHY, "prb_start %d\n", pucch_pdu->prb_start);
LOG_D(PHY,"nr_of_symbols %d\n", pucch_pdu->nr_of_symbols);
LOG_D(PHY,"hopping_id %d\n", pucch_pdu->hopping_id);
LOG_D(PHY,"initial_cyclic_shift %d\n", pucch_pdu->initial_cyclic_shift);
LOG_D(PHY,"mcs %d\n", pucch_pdu->mcs);
LOG_D(PHY,"start_sym_index %d\n", pucch_pdu->start_symbol_index);
LOG_D(PHY,"nr_slot_tx %d\n", nr_slot_tx);
for (int l=0; l<pucch_pdu->nr_of_symbols; l++) { for (int l=0; l<pucch_pdu->nr_of_symbols; l++) {
alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id, alpha = nr_cyclic_shift_hopping(pucch_pdu->hopping_id,
pucch_pdu->initial_cyclic_shift, pucch_pdu->initial_cyclic_shift,
......
...@@ -719,12 +719,7 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue, ...@@ -719,12 +719,7 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
} }
else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSFCH) { else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSFCH) {
LOG_I(NR_PHY,"Generating PSFCH ( )\n"); LOG_I(NR_PHY,"Generating PSFCH ( )\n");
// phy_data->nr_sl_psfch_pdu.start_symbol_index = 0;
// phy_data->nr_sl_psfch_pdu.hopping_id = 1;
// phy_data->nr_sl_psfch_pdu.prb = 2;
// phy_data->nr_sl_psfch_pdu.initial_cyclic_shift = 0;
// phy_data->nr_sl_psfch_pdu.mcs = 1;
nr_generate_psfch0(ue, nr_generate_psfch0(ue,
txdataF, txdataF,
fp, fp,
......
...@@ -575,7 +575,7 @@ typedef struct { ...@@ -575,7 +575,7 @@ typedef struct {
//// FAPI-like interface message //// FAPI-like interface message
fapi_nr_ul_config_request_t *ul_config_request; fapi_nr_ul_config_request_t *ul_config_request;
fapi_nr_dl_config_request_t *dl_config_request; fapi_nr_dl_config_request_t *dl_config_request;
sl_nr_tx_config_psfch_pdu_t *sl_tx_config_psfch_pdu;
/// Interface module instances /// Interface module instances
nr_ue_if_module_t *if_module; nr_ue_if_module_t *if_module;
nr_phy_config_t phy_config; nr_phy_config_t phy_config;
...@@ -600,6 +600,7 @@ typedef struct { ...@@ -600,6 +600,7 @@ typedef struct {
NR_SSB_meas_t ssb_measurements; NR_SSB_meas_t ssb_measurements;
dci_pdu_rel15_t def_dci_pdu_rel15[NR_MAX_SLOTS_PER_FRAME][8]; dci_pdu_rel15_t def_dci_pdu_rel15[NR_MAX_SLOTS_PER_FRAME][8];
sl_nr_tx_config_psfch_pdu_t *sl_tx_config_psfch_pdu;
// Defined for abstracted mode // Defined for abstracted mode
nr_downlink_indication_t dl_info; nr_downlink_indication_t dl_info;
......
...@@ -605,21 +605,24 @@ static uint16_t nr_ue_configure_psfch(int module_idP) { ...@@ -605,21 +605,24 @@ static uint16_t nr_ue_configure_psfch(int module_idP) {
mac->sl_tx_res_pool->sl_PSFCH_Config_r16->present != NR_SetupRelease_SL_PSFCH_Config_r16_PR_setup) mac->sl_tx_res_pool->sl_PSFCH_Config_r16->present != NR_SetupRelease_SL_PSFCH_Config_r16_PR_setup)
return; return;
NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_tx_res_pool->sl_PSFCH_Config_r16->choice.setup; NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_tx_res_pool->sl_PSFCH_Config_r16->choice.setup;
const int sl_num_muxcs_pair[4] = {1, 2, 3, 6}; const int sl_num_muxcs_pair[4] = {1, 2, 3, 6};
uint8_t sci2_src_id = mac->sci_pdu_rx.source_id; uint8_t sci2_src_id = mac->sci_pdu_rx.source_id;
uint8_t *rb_buf = sl_psfch_config->sl_PSFCH_RB_Set_r16->buf; LOG_D(NR_MAC, "source id %d, module_idP %d\n", sci2_src_id, module_idP);
size_t size = sl_psfch_config->sl_PSFCH_RB_Set_r16->size / sizeof(rb_buf[0]); uint8_t *rb_buf = sl_psfch_config->sl_PSFCH_RB_Set_r16->buf;
uint8_t m_psfch_prb_set = count_PSFCH_PRBs_bits(rb_buf, size); size_t size = sl_psfch_config->sl_PSFCH_RB_Set_r16->size / sizeof(rb_buf[0]);
long sl_numsubchannel = *mac->sl_tx_res_pool->sl_NumSubchannel_r16; uint8_t m_psfch_prb_set = count_PSFCH_PRBs_bits(rb_buf, size);
long sl_psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16; long sl_numsubchannel = *mac->sl_tx_res_pool->sl_NumSubchannel_r16;
long n_psfch_cs = *sl_psfch_config->sl_NumMuxCS_Pair_r16; long sl_psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16;
long n_psfch_cs = *sl_psfch_config->sl_NumMuxCS_Pair_r16;
double m_psfch_subch_slot = m_psfch_prb_set / sl_numsubchannel * sl_psfch_period;
long n_psfch_type = *sl_psfch_config->sl_PSFCH_CandidateResourceType_r16 ? sl_numsubchannel : 1; double m_psfch_subch_slot = m_psfch_prb_set / sl_numsubchannel * sl_psfch_period;
uint16_t r_psfch_prb_cs = n_psfch_type * m_psfch_subch_slot * sl_num_muxcs_pair[n_psfch_cs]; long n_psfch_type = *sl_psfch_config->sl_PSFCH_CandidateResourceType_r16 ? sl_numsubchannel : 1;
uint8_t psfch_rsc_idx = (sci2_src_id + module_idP) / r_psfch_prb_cs; uint16_t r_psfch_prb_cs = n_psfch_type * m_psfch_subch_slot * sl_num_muxcs_pair[n_psfch_cs];
return table_16_3_1[n_psfch_cs][psfch_rsc_idx]; uint8_t psfch_rsc_idx = (sci2_src_id + module_idP) / r_psfch_prb_cs;
LOG_D(NR_MAC, "size %d, m_psfch_prb_set %d, sl_numsubchannel %d, sl_psfch_period %d, n_psfch_cs %d\n", size, m_psfch_prb_set, sl_numsubchannel, sl_psfch_period, n_psfch_cs);
LOG_D(NR_MAC, "m_psfch_subch_slot %f, n_psfch_type %d, r_psfch_prb_cs %d, psfch_rsc_idx %d\n", m_psfch_subch_slot, n_psfch_type, r_psfch_prb_cs, psfch_rsc_idx);
return table_16_3_1[n_psfch_cs][psfch_rsc_idx];
} }
void nr_ue_process_mac_sl_pdu(int module_idP, void nr_ue_process_mac_sl_pdu(int module_idP,
...@@ -655,9 +658,16 @@ void nr_ue_process_mac_sl_pdu(int module_idP, ...@@ -655,9 +658,16 @@ void nr_ue_process_mac_sl_pdu(int module_idP,
NR_SL_BWP_Generic_r16_t *sl_bwp = mac->sl_bwp->sl_BWP_Generic_r16; NR_SL_BWP_Generic_r16_t *sl_bwp = mac->sl_bwp->sl_BWP_Generic_r16;
uint8_t sl_num_symbols = (sl_bwp->sl_LengthSymbols_r16) ? uint8_t sl_num_symbols = (sl_bwp->sl_LengthSymbols_r16) ?
values[*sl_bwp->sl_LengthSymbols_r16] : 0; values[*sl_bwp->sl_LengthSymbols_r16] : 0;
mac->sl_tx_config_psfch_pdu->start_symbol_index = mac->sl_bwp->sl_BWP_Generic_r16->sl_StartSymbol_r16 + sl_num_symbols - 2; // start_symbol_index has been used as lprime and lprime should be computed as lprime = start symbol + sl_LengthSymbols_r16 - 2 mac->sl_tx_config_psfch_pdu->start_symbol_index = *mac->sl_bwp->sl_BWP_Generic_r16->sl_StartSymbol_r16 + sl_num_symbols - 2; // start_symbol_index has been used as lprime and lprime should be computed as lprime = start symbol + sl_LengthSymbols_r16 - 2
mac->sl_tx_config_psfch_pdu->hopping_id = *mac->sl_bwp->sl_BWP_PoolConfigCommon_r16->sl_TxPoolSelectedNormal_r16->list.array[0]->sl_ResourcePool_r16->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_HopID_r16; mac->sl_tx_config_psfch_pdu->hopping_id = *mac->sl_bwp->sl_BWP_PoolConfigCommon_r16->sl_TxPoolSelectedNormal_r16->list.array[0]->sl_ResourcePool_r16->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_HopID_r16;
mac->sl_tx_config_psfch_pdu->prb = 2; mac->sl_tx_config_psfch_pdu->prb = 2;
LOG_D(NR_MAC,"Filled psfch pdu %d\n", module_idP);
LOG_D(NR_MAC,"pucch_pdu->hopping_id %d\n", mac->sl_tx_config_psfch_pdu->hopping_id);
LOG_D(NR_MAC,"pucch_pdu->initial_cyclic_shift %d\n", mac->sl_tx_config_psfch_pdu->initial_cyclic_shift);
LOG_D(NR_MAC,"pucch_pdu->mcs %d\n", mac->sl_tx_config_psfch_pdu->mcs);
LOG_D(NR_MAC,"start_sym_index %d\n", mac->sl_tx_config_psfch_pdu->start_symbol_index);
} }
if ((rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack == 0) if ((rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack == 0)
......
...@@ -3588,11 +3588,8 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) { ...@@ -3588,11 +3588,8 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
sl_ind->frame_tx = (frame + 1) % 1024; sl_ind->frame_tx = (frame + 1) % 1024;
} }
// Need to check further weather New slot is SIDELINK SLOT or not // Need to check further weather New slot is SIDELINK SLOT or not
//LOG_I(NR_MAC, "sl_ind->slot_type %d, slot: %d, psfch_period: %ld, slot_mod_psfch_period: %d\n", sl_ind->slot_type, slot, psfch_period, slot%psfch_period);
LOG_I(NR_MAC, "sci_pdu feedback %d, cast_type %d\n", mac->sci_pdu_rx.harq_feedback, mac->sci_pdu_rx.cast_type);
// Add further check based on HARQ-ACK indication in SCI // Add further check based on HARQ-ACK indication in SCI
if (slot%psfch_period == 0) { if (slot%psfch_period == 0) {
LOG_I(NR_MAC,"Scheduling PSFCH TX processing slot %d\n", slot);
nr_ue_sl_psfch_scheduler(mac, sl_ind, mac->sl_bwp, mac->sl_tx_res_pool, &tx_config, &tti_action); nr_ue_sl_psfch_scheduler(mac, sl_ind, mac->sl_bwp, mac->sl_tx_res_pool, &tx_config, &tti_action);
} }
} }
...@@ -3624,7 +3621,7 @@ void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -3624,7 +3621,7 @@ void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac,
const NR_SL_ResourcePool_r16_t *sl_res_pool, const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_tx_config_request_t *tx_config, sl_nr_tx_config_request_t *tx_config,
uint8_t *config_type) { uint8_t *config_type) {
LOG_I(NR_MAC,"PSFCH %s\n", __FUNCTION__);
uint8_t ret_status = 0; uint8_t ret_status = 0;
uint16_t slot = sl_ind->slot_tx; uint16_t slot = sl_ind->slot_tx;
uint16_t frame = sl_ind->frame_tx; uint16_t frame = sl_ind->frame_tx;
...@@ -3648,11 +3645,16 @@ void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -3648,11 +3645,16 @@ void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac,
sl_ind->module_id, frame, slot,sl_ind->slot_type); sl_ind->module_id, frame, slot,sl_ind->slot_type);
sl_nr_tx_config_psfch_pdu_t *tx_psfch_pdu = &tx_config->tx_config_list[0].tx_psfch_config_pdu; sl_nr_tx_config_psfch_pdu_t *tx_psfch_pdu = &tx_config->tx_config_list[0].tx_psfch_config_pdu;
tx_psfch_pdu->start_symbol_index = 0; tx_psfch_pdu->start_symbol_index = mac->sl_tx_config_psfch_pdu->start_symbol_index;
tx_psfch_pdu->hopping_id = 1; tx_psfch_pdu->hopping_id = mac->sl_tx_config_psfch_pdu->hopping_id;
tx_psfch_pdu->prb = 2; tx_psfch_pdu->prb = mac->sl_tx_config_psfch_pdu->prb;
tx_psfch_pdu->initial_cyclic_shift = 0; tx_psfch_pdu->initial_cyclic_shift = mac->sl_tx_config_psfch_pdu->initial_cyclic_shift;
tx_psfch_pdu->mcs = 1; tx_psfch_pdu->mcs = mac->sl_tx_config_psfch_pdu->mcs;
tx_psfch_pdu->freq_hop_flag = 0;
tx_psfch_pdu->second_hop_prb = 0;
tx_psfch_pdu->group_hop_flag = 0;
tx_psfch_pdu->sequence_hop_flag = 0;
tx_psfch_pdu->nr_of_symbols = 1;
const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG); const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG);
*config_type = SL_NR_CONFIG_TYPE_TX_PSFCH; *config_type = SL_NR_CONFIG_TYPE_TX_PSFCH;
......
...@@ -141,7 +141,7 @@ static void prepare_NR_SL_ResourcePool(NR_SL_ResourcePool_r16_t *sl_res_pool, ...@@ -141,7 +141,7 @@ static void prepare_NR_SL_ResourcePool(NR_SL_ResourcePool_r16_t *sl_res_pool,
//and HARQ feedback for all transmissions in the resource pool is disabled. //and HARQ feedback for all transmissions in the resource pool is disabled.
// {sl0, sl1, sl2, sl4} // {sl0, sl1, sl2, sl4}
sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_Period_r16 = calloc(1, sizeof(long)); sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_Period_r16 = calloc(1, sizeof(long));
*sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_Period_r16 = NR_SL_PSFCH_Config_r16__sl_PSFCH_Period_r16_sl1; *sl_res_pool->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_Period_r16 = NR_SL_PSFCH_Config_r16__sl_PSFCH_Period_r16_sl2;
// Set of PRBs that are actually used for PSFCH transmission and reception (bitmap) // Set of PRBs that are actually used for PSFCH transmission and reception (bitmap)
// 0b10101010101010101010101010101010101010101010101001 (PRBs bitmap) // 0b10101010101010101010101010101010101010101010101001 (PRBs bitmap)
......
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